Adam Nemet f1b790f791 [X86] AVX512: Add non-temporal stores ...

Note that I followed the AVX2 convention here and didn't add LLVM intrinsics
for stores.  These can be generated with the nontemporal hint on LLVM IR
stores (see new test). The GCC builtins are lowered directly into nontemporal
stores.

<rdar://problem/17082571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211176 91177308-0d34-0410-b5e6-96231b3b80d8

2014-06-18 16:51:10 +00:00

..

AArch64

[AArch64] Fix a pattern match failure caused by creating improper CONCAT_VECTOR.

2014-06-18 05:54:42 +00:00

ARM

ARM: implement correct atomic operations on v7M

2014-06-16 18:49:36 +00:00

CPP

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Generic

Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute.

2014-06-05 19:29:43 +00:00

Hexagon

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

Inputs

…

Mips

Add load/store functionality

2014-06-16 22:05:47 +00:00

MSP430

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

NVPTX

Canonicalize addrspacecast ConstExpr between different pointer types

2014-06-15 21:40:57 +00:00

PowerPC

[PowerPC] Do not use BLA with the 64-bit SVR4 ABI

2014-06-18 16:14:04 +00:00

R600

R600: Implement 64bit SRA

2014-06-18 12:27:17 +00:00

SPARC

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

SystemZ

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Thumb

ARM: Fix fastcc calling convention for Thumb1

2014-06-13 08:33:03 +00:00

Thumb2

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

X86

[X86] AVX512: Add non-temporal stores

2014-06-18 16:51:10 +00:00

XCore

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00