mirror of
https://github.com/c64scene-ar/llvm-6502.git
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bc2198133a
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149961 91177308-0d34-0410-b5e6-96231b3b80d8
79 lines
2.8 KiB
C++
79 lines
2.8 KiB
C++
//===-- ARMELFWriterInfo.cpp - ELF Writer Info for the ARM backend --------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements ELF writer information for the ARM backend.
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//
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//===----------------------------------------------------------------------===//
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#include "ARMELFWriterInfo.h"
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#include "ARMRelocations.h"
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#include "llvm/Function.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/ELF.h"
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using namespace llvm;
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//===----------------------------------------------------------------------===//
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// Implementation of the ARMELFWriterInfo class
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//===----------------------------------------------------------------------===//
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ARMELFWriterInfo::ARMELFWriterInfo(TargetMachine &TM)
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: TargetELFWriterInfo(TM.getTargetData()->getPointerSizeInBits() == 64,
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TM.getTargetData()->isLittleEndian()) {
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}
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ARMELFWriterInfo::~ARMELFWriterInfo() {}
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unsigned ARMELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
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switch (MachineRelTy) {
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case ARM::reloc_arm_absolute:
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case ARM::reloc_arm_relative:
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case ARM::reloc_arm_cp_entry:
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case ARM::reloc_arm_vfp_cp_entry:
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case ARM::reloc_arm_machine_cp_entry:
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case ARM::reloc_arm_jt_base:
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case ARM::reloc_arm_pic_jt:
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llvm_unreachable("unsupported ARM relocation type");
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case ARM::reloc_arm_branch: return ELF::R_ARM_CALL;
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case ARM::reloc_arm_movt: return ELF::R_ARM_MOVT_ABS;
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case ARM::reloc_arm_movw: return ELF::R_ARM_MOVW_ABS_NC;
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default:
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llvm_unreachable("unknown ARM relocation type");
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}
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}
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long int ARMELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
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long int Modifier) const {
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llvm_unreachable("ARMELFWriterInfo::getDefaultAddendForRelTy() not "
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"implemented");
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}
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unsigned ARMELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
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llvm_unreachable("ARMELFWriterInfo::getRelocationTySize() not implemented");
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}
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bool ARMELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
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llvm_unreachable("ARMELFWriterInfo::isPCRelativeRel() not implemented");
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}
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unsigned ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
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llvm_unreachable("ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() not "
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"implemented");
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}
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long int ARMELFWriterInfo::computeRelocation(unsigned SymOffset,
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unsigned RelOffset,
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unsigned RelTy) const {
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llvm_unreachable("ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() not "
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"implemented");
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}
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