Juergen Ributzka f245d9aa77 [FastISel][X86] Emit more efficient instructions for integer constant materialization. ...

This mostly affects the i64 value type, which always resulted in an 15byte
mobavsq instruction to materialize any constant. The custom code checks the
value of the immediate and tries to use a different and smaller mov
instruction when possible.

This fixes <rdar://problem/17420988>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215593 91177308-0d34-0410-b5e6-96231b3b80d8

2014-08-13 22:18:11 +00:00

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AArch64

[FastISel][AArch64] Make use of the zero register when possible.

2014-08-13 22:13:14 +00:00

ARM

[FastISel] Let the target decide first if it wants to materialize a constant.

2014-08-13 22:08:02 +00:00

CPP

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Generic

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Hexagon

DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range.

2014-08-06 00:21:25 +00:00

Inputs

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Mips

Add support for scalarizing cttz_zero_undef

2014-08-10 22:49:54 +00:00

MSP430

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NVPTX

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PowerPC

[FastISel] Let the target decide first if it wants to materialize a constant.

2014-08-13 22:08:02 +00:00

R600

R600: Correctly set the src value offset for scalarized kernel args

2014-08-13 18:14:11 +00:00

SPARC

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SystemZ

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Thumb

[ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly

2014-08-02 05:40:40 +00:00

Thumb2

ARM: do not generate BLX instructions on Cortex-M CPUs.

2014-08-06 11:13:14 +00:00

X86

[FastISel][X86] Emit more efficient instructions for integer constant materialization.

2014-08-13 22:18:11 +00:00

XCore

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