llvm-6502/test/CodeGen/R600/llvm.sin.ll
Vincent Lejeune c6f13db656 R600: Use DAG lowering pass to handle fcos/fsin
NOTE: This is a candidate for the stable branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185940 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 15:03:11 +00:00

20 lines
492 B
LLVM

;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
;CHECK: MULADD_IEEE *
;CHECK: FRACT *
;CHECK: ADD *
;CHECK: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
define void @test() {
%r0 = call float @llvm.R600.load.input(i32 0)
%r1 = call float @llvm.sin.f32( float %r0)
call void @llvm.AMDGPU.store.output(float %r1, i32 0)
ret void
}
declare float @llvm.sin.f32(float) readnone
declare float @llvm.R600.load.input(i32) readnone
declare void @llvm.AMDGPU.store.output(float, i32)