llvm-6502/test/CodeGen
Elena Demikhovsky 62d66cbec5 AVX-512: PMIN/PMAX intrinsics and patterns
Patch by Cameron McInally <cameron.mcinally@nyu.edu>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193497 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-27 08:18:37 +00:00
..
AArch64 [AArch64] Fix NZCV reg live-in bug in F128CSEL codegen. 2013-10-24 08:28:24 +00:00
ARM ARM: don't expand atomicrmw inline on Cortex-M0 2013-10-25 09:30:24 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips][msa] Added support for matching fexp2 from normal IR (i.e. not intrinsics) 2013-10-23 10:36:52 +00:00
MSP430 Make sure SP is always aligned on a 2 byte boundary 2013-10-24 09:32:31 +00:00
NVPTX
PowerPC
R600 R600/SI: fix MIMG writemask adjustement 2013-10-23 02:53:47 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86 AVX-512: PMIN/PMAX intrinsics and patterns 2013-10-27 08:18:37 +00:00
XCore