llvm-6502/test/CodeGen/ARM
Evan Cheng 1c487869f5 DAG combine should not increase alignment of loads / stores with alignment less
than ABI alignment. These are loads / stores from / to "packed" data structures.
Their alignments are intentionally under-specified.

rdar://10301431


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145273 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-28 20:42:56 +00:00
..
2006-11-10-CycleInDAG.ll
2007-01-19-InfiniteLoop.ll
2007-03-07-CombinerCrash.ll
2007-03-13-InstrSched.ll
2007-03-21-JoinIntervalsCrash.ll
2007-03-27-RegScavengerAssert.ll
2007-03-30-RegScavengerAssert.ll
2007-04-02-RegScavengerAssert.ll
2007-04-03-PEIBug.ll
2007-04-03-UndefinedSymbol.ll
2007-04-30-CombinerCrash.ll
2007-05-03-BadPostIndexedLd.ll
2007-05-07-tailmerge-1.ll
2007-05-09-tailmerge-2.ll
2007-05-14-InlineAsmCstCrash.ll
2007-05-14-RegScavengerAssert.ll
2007-05-22-tailmerge-3.ll
2007-05-23-BadPreIndexedStore.ll
2007-08-15-ReuseBug.ll
2008-02-04-LocalRegAllocBug.ll
2008-02-29-RegAllocLocal.ll
2008-03-05-SxtInRegBug.ll
2008-03-07-RegScavengerAssert.ll Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic. 2011-11-27 06:54:59 +00:00
2008-04-04-ScavengerAssert.ll
2008-04-10-ScavengerAssert.ll
2008-04-11-PHIofImpDef.ll Eliminate more uses of llvm-as and llvm-dis. 2009-09-09 00:09:15 +00:00
2008-05-19-LiveIntervalsBug.ll
2008-05-19-ScavengerAssert.ll
2008-07-17-Fdiv.ll
2008-07-24-CodeGenPrepCrash.ll
2008-08-07-AsmPrintBug.ll
2008-09-17-CoalescerBug.ll
2008-11-18-ScavengerAssert.ll
2009-02-16-SpillerBug.ll
2009-02-22-SoftenFloatVaArg.ll
2009-02-27-SpillerBug.ll
2009-03-07-SpillerBug.ll
2009-03-09-AddrModeBug.ll
2009-04-06-AsmModifier.ll
2009-04-08-AggregateAddr.ll
2009-04-08-FloatUndef.ll
2009-04-08-FREM.ll
2009-04-09-RegScavengerAsm.ll
2009-05-05-DAGCombineBug.ll
2009-05-07-RegAllocLocal.ll
2009-05-11-CodePlacementCrash.ll
2009-05-18-InlineAsmMem.ll
2009-06-02-ISelCrash.ll
2009-06-04-MissingLiveIn.ll
2009-06-15-RegScavengerAssert.ll
2009-06-19-RegScavengerAssert.ll
2009-06-22-CoalescerBug.ll
2009-06-30-RegScavengerAssert2.ll
2009-06-30-RegScavengerAssert3.ll
2009-06-30-RegScavengerAssert4.ll
2009-06-30-RegScavengerAssert5.ll
2009-06-30-RegScavengerAssert.ll
2009-07-01-CommuteBug.ll
2009-07-09-asm-p-constraint.ll
2009-07-18-RewriterBug.ll
2009-07-22-ScavengerAssert.ll
2009-07-22-SchedulerAssert.ll
2009-07-29-VFP3Registers.ll
2009-08-02-RegScavengerAssert-Neon.ll
2009-08-04-RegScavengerAssert-2.ll
2009-08-04-RegScavengerAssert.ll
2009-08-15-RegScavenger-EarlyClobber.ll
2009-08-15-RegScavengerAssert.ll
2009-08-21-PostRAKill2.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-08-21-PostRAKill3.ll
2009-08-21-PostRAKill.ll
2009-08-23-linkerprivate.ll
2009-08-26-ScalarToVector.ll
2009-08-27-ScalarToVector.ll
2009-08-29-ExtractEltf32.ll
2009-08-29-TooLongSplat.ll
2009-08-31-LSDA-Name.ll Convert tests to the new EH model. 2011-11-08 00:09:27 +00:00
2009-08-31-TwoRegShuffle.ll
2009-09-09-AllOnes.ll
2009-09-09-fpcmp-ole.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
2009-09-10-postdec.ll
2009-09-13-InvalidSubreg.ll
2009-09-13-InvalidSuperReg.ll
2009-09-20-LiveIntervalsBug.ll
2009-09-21-LiveVariablesBug.ll
2009-09-22-LiveVariablesBug.ll
2009-09-23-LiveVariablesBug.ll
2009-09-24-spill-align.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
2009-09-27-CoalescerBug.ll
2009-09-28-LdStOptiBug.ll
2009-10-02-NEONSubregsBug.ll
2009-10-16-Scope.ll Add a new wrapper node for a DILexicalBlock that encapsulates it and a 2011-10-11 22:59:11 +00:00
2009-10-21-InvalidFNeg.ll
2009-10-27-double-align.ll
2009-10-30.ll
2009-11-01-NeonMoves.ll Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues to simplify the path towards an auto-generated disassembler. 2011-07-15 18:46:47 +00:00
2009-11-02-NegativeLane.ll
2009-11-07-SubRegAsmPrinting.ll
2009-11-13-CoalescerCrash.ll
2009-11-13-ScavengerAssert2.ll
2009-11-13-ScavengerAssert.ll
2009-11-13-VRRewriterCrash.ll
2009-11-30-LiveVariablesBug.ll
2009-12-02-vtrn-undef.ll
2010-03-04-eabi-fp-spill.ll
2010-03-04-stm-undef-addr.ll
2010-03-18-ldm-rtrn.ll
2010-04-07-DbgValueOtherTargets.ll
2010-04-09-NeonSelect.ll
2010-04-13-v2f64SplitArg.ll
2010-04-14-SplitVector.ll
2010-04-15-ScavengerDebugValue.ll
2010-05-14-IllegalType.ll
2010-05-17-FastAllocCrash.ll
2010-05-18-LocalAllocCrash.ll
2010-05-18-PostIndexBug.ll
2010-05-19-Shuffles.ll
2010-05-20-NEONSpillCrash.ll Switch a few tests off linearscan. 2011-11-12 19:53:52 +00:00
2010-05-21-BuildVector.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
2010-06-11-vmovdrr-bitcast.ll
2010-06-21-LdStMultipleBug.ll
2010-06-21-nondarwin-tc.ll
2010-06-25-Thumb2ITInvalidIterator.ll
2010-06-29-PartialRedefFastAlloc.ll
2010-06-29-SubregImpDefs.ll
2010-07-26-GlobalMerge.ll Convert tests to the new EH model. 2011-11-08 00:09:27 +00:00
2010-08-04-EHCrash.ll Convert tests to the new EH model. 2011-11-08 00:09:27 +00:00
2010-08-04-StackVariable.ll
2010-09-21-OptCmpBug.ll
2010-09-29-mc-asm-header-test.ll
2010-10-19-mc-elf-objheader.ll
2010-10-25-ifcvt-ldm.ll
2010-11-15-SpillEarlyClobber.ll Delete the 'standard' spiller with used the old spilling framework. 2011-11-12 23:29:02 +00:00
2010-11-29-PrologueBug.ll
2010-11-30-reloc-movt.ll Print r_sym with the correct number of bits. 2011-08-04 14:48:27 +00:00
2010-12-07-PEIBug.ll
2010-12-08-tpsoft.ll
2010-12-15-elf-lcomm.ll Don't drop alignment info on local common symbols. 2011-09-01 23:04:27 +00:00
2010-12-17-LocalStackSlotCrash.ll
2011-01-19-MergedGlobalDbg.ll Always use the string pool, even when it makes the .o larger. This may help 2011-10-28 05:29:47 +00:00
2011-02-04-AntidepMultidef.ll
2011-02-07-AntidepClobber.ll
2011-03-10-DAGCombineCrash.ll
2011-03-15-LdStMultipleBug.ll
2011-03-23-PeepholeBug.ll
2011-04-07-schediv.ll
2011-04-11-MachineLICMBug.ll
2011-04-12-AlignBug.ll
2011-04-12-FastRegAlloc.ll
2011-04-15-AndVFlagPeepholeBug.ll
2011-04-15-RegisterCmpPeephole.ll
2011-04-26-SchedTweak.ll
2011-04-27-IfCvtBug.ll
2011-05-04-MultipleLandingPadSuccs.ll Convert tests to the new EH model. 2011-11-08 00:09:27 +00:00
2011-06-09-TailCallByVal.ll PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval 2011-09-26 06:13:20 +00:00
2011-06-16-TailCallByVal.ll
2011-06-29-MergeGlobalsAlign.ll
2011-07-10-GlobalMergeBug.ll
2011-08-02-MergedGlobalDbg.ll Always use the string pool, even when it makes the .o larger. This may help 2011-10-28 05:29:47 +00:00
2011-08-12-vmovqqqq-pseudo.ll With the fix in r138164: "Add <imp-def> operands to QQ and QQQQ stack loads." 2011-08-20 00:34:45 +00:00
2011-08-25-ldmia_ret.ll ARM fix for missing implicit operands on ldmia_ret. 2011-08-25 17:50:53 +00:00
2011-08-29-ldr_pre_imm.ll Add testcase for r138746. 2011-08-29 18:02:40 +00:00
2011-08-29-SchedCycle.ll Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical 2011-08-30 01:34:54 +00:00
2011-09-09-OddVectorDivision.ll Fix mistake in test runline. 2011-09-12 17:32:58 +00:00
2011-09-19-cpsr.ll ARM isel bug fix for adds/subs operands. 2011-09-20 03:17:40 +00:00
2011-09-28-CMovCombineBug.ll Tighten a ARM dag combine condition to avoid an identity transformation, which 2011-09-28 23:16:31 +00:00
2011-10-26-ExpandUnalignedLoadCrash.ll Don't try to form pre/post-indexed loads/stores until after LegalizeDAG runs. Fixes PR11029. 2011-11-12 00:35:34 +00:00
2011-10-26-memset-inline.ll Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported. 2011-11-08 18:56:23 +00:00
2011-10-26-memset-with-neon.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
2011-11-07-PromoteVectorLoadStore.ll Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3. 2011-11-11 03:16:38 +00:00
2011-11-09-BitcastVectorDouble.ll Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319. 2011-11-09 22:25:12 +00:00
2011-11-09-IllegalVectorFPIntConvert.ll Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM. 2011-11-09 23:36:02 +00:00
2011-11-14-EarlyClobber.ll Fix early-clobber handling in shrinkToUses. 2011-11-14 18:45:38 +00:00
2011-11-28-DAGCombineBug.ll DAG combine should not increase alignment of loads / stores with alignment less 2011-11-28 20:42:56 +00:00
addrmode.ll
aliases.ll
align.ll
alloca.ll
argaddr.ll
arguments2.ll
arguments3.ll
arguments4.ll
arguments5.ll
arguments6.ll
arguments7.ll
arguments8.ll
arguments_f64_backfill.ll
arguments-nosplit-double.ll
arguments-nosplit-i64.ll
arguments.ll
arm-and-tst-peephole.ll
arm-asm.ll
arm-frameaddr.ll
arm-modifier.ll
arm-negative-stride.ll
arm-returnaddr.ll
armv4.ll
atomic-64bit.ll Generic expansion for atomic load/store into cmpxchg/atomicrmw xchg; implements 64-bit atomic load/store for ARM. 2011-08-31 18:26:09 +00:00
atomic-cmp.ll Convert more tests over to the new atomic instructions. 2011-09-26 20:27:49 +00:00
atomic-load-store.ll Some additional tests for Thumb atomic load and store (which I somehow forgot to commit earlier). 2011-09-19 22:02:33 +00:00
atomic-op.ll Convert more tests over to the new atomic instructions. 2011-09-26 20:27:49 +00:00
available_externally.ll
avoid-cpsr-rmw.ll Avoid partial CPSR dependency from loop backedges. rdar://10357570 2011-10-27 21:21:05 +00:00
bfc.ll
bfi.ll
bfx.ll
bic.ll
bits.ll
bswap-inline-asm.ll
bx_fold.ll
call_nolink.ll
call-tc.ll Reenable tail calls for iOS 5.0 and later. 2011-10-07 17:17:49 +00:00
call.ll Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic. 2011-11-27 06:54:59 +00:00
carry.ll Fix fall outs from my recent change on how carry bit is modeled during isel. 2011-09-06 18:52:20 +00:00
clz.ll
code-placement.ll
compare-call.ll
constants.ll
crash-greedy-v6.ll Fix a crash when building 177.mesa for armv6. 2011-07-18 18:47:13 +00:00
crash-greedy.ll
crash-O0.ll
crash.ll Transfer implicit operands in NEONMoveFixPass. 2011-07-29 00:27:35 +00:00
cse-libcalls.ll
ctors_dtors.ll
ctz.ll
debug-info-arg.ll Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges. 2011-09-08 22:59:09 +00:00
debug-info-blocks.ll Loosen test by using REs. Approved by Devang. 2011-11-11 23:25:38 +00:00
debug-info-branch-folding.ll
debug-info-d16-reg.ll
debug-info-qreg.ll Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer. 2011-11-05 11:52:44 +00:00
debug-info-s16-reg.ll Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer. 2011-11-05 11:52:44 +00:00
debug-info-sreg2.ll Teach our Dwarf emission to use the string pool. 2011-10-27 06:44:11 +00:00
dg.exp
div.ll
divmod.ll Reenable use of divmod compiler_rt functions for iOS 5.0 and later. 2011-10-07 16:59:21 +00:00
dyn-stackalloc.ll
eh-resume-darwin.ll Convert tests to the new EH model. 2011-11-08 00:09:27 +00:00
elf-lcomm-align.ll Don't drop alignment info on local common symbols. 2011-09-01 23:04:27 +00:00
extloadi1.ll
fabss.ll Inflate register classes after coalescing. 2011-08-09 18:19:41 +00:00
fadds.ll
fast-isel-br-const.ll A branch predicated on a constant can just FastEmit an unconditional branch. 2011-10-27 00:21:16 +00:00
fast-isel-call.ll Enable support for returning i1, i8, and i16. Nothing special todo as it's the 2011-11-08 00:03:32 +00:00
fast-isel-cmp-imm.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
fast-isel-conversion.ll Add support for sign-extending non-legal types in SelectSIToFP(). 2011-11-03 02:04:59 +00:00
fast-isel-crash2.ll
fast-isel-crash.ll
fast-isel-fold.ll Add support for emitting both signed- and zero-extend loads. Fix 2011-11-13 02:23:59 +00:00
fast-isel-GEP-coalesce.ll When fast iseling a GEP, accumulate the offset rather than emitting a series of 2011-11-17 07:15:58 +00:00
fast-isel-icmp.ll Add support for comparing integer non-legal types. 2011-11-02 18:08:25 +00:00
fast-isel-intrinsic.ll Add support for inlining small memcpys. 2011-11-14 22:46:17 +00:00
fast-isel-ldr-str-arm.ll Add newline to end of file. Thanks, Eli. 2011-11-14 22:48:33 +00:00
fast-isel-ldr-str-thumb-neg-index.ll Add support for Thumb load/stores with negative offsets. 2011-11-14 20:22:27 +00:00
fast-isel-ldrh-strh-arm.ll Add support for ARM halfword load/stores and signed byte loads with negative 2011-11-14 04:09:28 +00:00
fast-isel-mvn.ll Add support for using MVN to materialize negative constants. 2011-11-11 00:36:21 +00:00
fast-isel-pred.ll
fast-isel-redefinition.ll Switch a few tests off linearscan. 2011-11-12 19:53:52 +00:00
fast-isel-ret.ll Add fast-isel support for returning i1, i8, and i16. 2011-11-04 00:50:21 +00:00
fast-isel-select.ll Add support for using immediates with select instructions. 2011-11-11 06:20:39 +00:00
fast-isel-static.ll
fast-isel.ll ARM Darwin default relocation model is PIC. 2011-09-30 17:41:35 +00:00
fcopysign.ll
fdivs.ll
fixunsdfdi.ll
flag-crash.ll
fmacs.ll
fmdrr-fmrrd.ll
fmscs.ll
fmuls.ll
fnegs.ll
fnmacs.ll
fnmscs.ll
fnmul.ll
fnmuls.ll
fold-const.ll
formal.ll
fp16.ll
fp_convert.ll Inflate register classes after coalescing. 2011-08-09 18:19:41 +00:00
fp-arg-shuffle.ll
fp.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
fparith.ll
fpcmp_ueq.ll
fpcmp-opt.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
fpcmp.ll
fpconsts.ll
fpconv.ll
fpmem.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
fpow.ll
fpowi.ll
fptoint.ll
fsubs.ll
global-merge.ll
globals.ll
gv-stubs-crash.ll Check the visibility of the global variable before placing it into the stubs 2011-10-24 23:05:43 +00:00
hardfloat_neon.ll
hello.ll
hidden-vis-2.ll ARM Darwin default relocation model is PIC. 2011-09-30 17:41:35 +00:00
hidden-vis-3.ll ARM Darwin default relocation model is PIC. 2011-09-30 17:41:35 +00:00
hidden-vis.ll
iabs.ll Reapply r141365 now that PR11107 is fixed. 2011-10-10 22:59:55 +00:00
ifcvt1.ll
ifcvt2.ll
ifcvt3.ll
ifcvt4.ll Remove underscore that's breaking linux buildbots. 2011-08-03 23:13:01 +00:00
ifcvt5.ll
ifcvt6.ll
ifcvt7.ll
ifcvt8.ll
ifcvt9.ll
ifcvt10.ll
ifcvt11.ll
illegal-vector-bitcast.ll
imm.ll
indirectbr.ll Use MachineBranchProbabilityInfo in If-Conversion instead of its own heuristics. 2011-08-03 22:34:43 +00:00
inlineasm2.ll
inlineasm3.ll Add support for the 'Q' constraint. 2011-07-29 21:18:58 +00:00
inlineasm4.ll Add support for the R and Q constraints. 2011-08-10 16:26:42 +00:00
inlineasm-imm-arm.ll
inlineasm.ll
insn-sched1.ll
int-to-fp.ll
intrinsics.ll
ispositive.ll
jumptable-label.ll
large-stack.ll
ldm.ll
ldr_ext.ll
ldr_frame.ll
ldr_post.ll
ldr_pre.ll
ldr.ll
ldrd-memoper.ll Preserve MachineMemOperands in ARMLoadStoreOptimizer. 2011-11-11 22:18:09 +00:00
ldrd.ll Add workaround for Cortex-M3 errata 602117 by replacing ldrd x, y, [x] with ldm or ldr pairs. 2011-11-08 21:21:09 +00:00
ldst-f32-2-i32.ll
ldstrexd.ll
load-global.ll
load.ll
long_shift.ll
long-setcc.ll
long.ll
lsr-code-insertion.ll
lsr-on-unrolled-loops.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
lsr-scale-addr-mode.ll
lsr-unfolded-offset.ll Add dominance check for the instruction being hoisted. 2011-10-11 18:09:58 +00:00
machine-cse-cmp.ll
machine-licm.ll
mem.ll
memcpy-inline.ll Delete stale comment. 2011-11-14 18:03:05 +00:00
memfunc.ll
mls.ll
movt-movw-global.ll
movt.ll
mul_const.ll
mul.ll
mulhi.ll Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does not support Thumb2 dsp instructions. rdar://10152911. 2011-09-20 21:38:18 +00:00
mult-alt-generic-arm.ll
mvn.ll
neon_arith1.ll
neon_div.ll
neon_ld1.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
neon_ld2.ll
neon_minmax.ll
neon_shift.ll
pack.ll
peephole-bitcast.ll XFAIL test that depends on linear scan to remove dead code. 2011-11-12 22:39:30 +00:00
phi.ll
pr3502.ll Eliminate more uses of llvm-as and llvm-dis. 2009-09-09 00:09:15 +00:00
prefetch.ll
private.ll
reg_sequence.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
ret0.ll
ret_arg1.ll
ret_arg2.ll
ret_arg3.ll
ret_arg4.ll
ret_arg5.ll
ret_f32_arg2.ll
ret_f32_arg5.ll
ret_f64_arg2.ll
ret_f64_arg_reg_split.ll
ret_f64_arg_split.ll
ret_f64_arg_stack.ll
ret_i64_arg2.ll
ret_i64_arg3.ll
ret_i64_arg_split.ll
ret_i128_arg2.ll
ret_void.ll
rev.ll
sbfx.ll
section.ll
select_xform.ll
select-imm.ll Thumb2 remove redundant ".w" suffix from t2MVNCCi pattern. 2011-10-26 17:28:15 +00:00
select.ll Fix SimplifySelectCC to add newly created nodes to the DAGCombiner 2011-09-22 23:01:29 +00:00
shifter_operand.ll Remove a check from ARM shifted operand isel helper methods, which were blocking 2011-10-05 23:38:50 +00:00
shuffle.ll
smul.ll
spill-q.ll
stack-frame.ll
stm.ll
str_post.ll
str_pre-2.ll Linear scan is going away. 2011-11-12 22:39:34 +00:00
str_pre.ll
str_trunc.ll
sub.ll
subreg-remat.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
sxt_rot.ll FileCheck'ize test. 2011-07-26 20:49:44 +00:00
t2-imm.ll
tail-opts.ll ARM Darwin default relocation model is PIC. 2011-09-30 17:41:35 +00:00
thread_pointer.ll
thumb1-varalloc.ll
thumb2-it-block.ll Test simplification that Ana Pazos noticed. 2011-10-11 04:43:15 +00:00
tls1.ll
tls2.ll
tls3.ll
trap.ll
trunc_ldr.ll
truncstore-dag-combine.ll
tst_teq.ll
uint64tof64.ll
umulo-32.ll
unaligned_load_store.ll
undef-sext.ll
unord.ll
uxt_rot.ll
uxtb.ll
va_arg.ll Make this test less sensitive to codegen optimizations. 2011-10-05 18:13:08 +00:00
vaba.ll
vabd.ll
vabs.ll
vadd.ll
vargs_align.ll
vargs.ll
vbits.ll
vbsl-constant.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
vbsl.ll
vceq.ll
vcge.ll
vcgt.ll
vcnt.ll
vcombine.ll
vcvt_combine.ll
vcvt.ll
vdiv_combine.ll
vdup.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
vector-DAGCombine.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
vext.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
vfcmp.ll
vfp.ll
vget_lane.ll
vhadd.ll
vhsub.ll
vicmp.ll
vld1.ll
vld2.ll
vld3.ll
vld4.ll
vlddup.ll Also set addrmode6 alignment when align==size. 2011-10-27 22:39:16 +00:00
vldlane.ll Also set addrmode6 alignment when align==size. 2011-10-27 22:39:16 +00:00
vminmax.ll Merge a bunch of NEON tests into larger files so they run faster. 2009-10-09 20:20:54 +00:00
vmla.ll
vmls.ll
vmov.ll Add vmov.f32 to materialize f32 immediate splats which cannot be handled by 2011-11-15 02:12:34 +00:00
vmul.ll Fix incorrect check for sign-extended constant BUILD_VECTOR. 2011-10-18 17:34:51 +00:00
vneg.ll
vpadal.ll
vpadd.ll
vpminmax.ll
vqadd.ll
vqdmul.ll
vqshl.ll
vqshrn.ll
vqsub.ll
vrec.ll
vrev.ll Add CHECKs and document PR11158. 2011-10-17 20:23:23 +00:00
vshift.ll
vshiftins.ll
vshl.ll
vshll.ll
vshrn.ll
vsra.ll
vst1.ll
vst2.ll
vst3.ll
vst4.ll
vstlane.ll Also set addrmode6 alignment when align==size. 2011-10-27 22:39:16 +00:00
vsub.ll
vtbl.ll
vtrn.ll
vuzp.ll
vzip.ll
weak2.ll
weak.ll
widen-vmovs.ll ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00