llvm-6502/test/CodeGen/X86/avx-256-cvt.ll
Bruno Cardoso Lopes 55244ceac4 Add v4f64 -> v2f32 fp_round support. Also add a testcase to exercise
the legalizer. This commit together with the two previous ones fixes
PR10495.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 21:54:09 +00:00

22 lines
578 B
LLVM

; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
; CHECK: vcvtdq2ps %ymm
define <8 x float> @funcA(<8 x i32> %a) nounwind {
%b = sitofp <8 x i32> %a to <8 x float>
ret <8 x float> %b
}
; CHECK: vcvttps2dq %ymm
define <8 x i32> @funcB(<8 x float> %a) nounwind {
%b = fptosi <8 x float> %a to <8 x i32>
ret <8 x i32> %b
}
; CHECK: vcvtpd2psy %ymm
; CHECK-NEXT: vcvtpd2psy %ymm
; CHECK-NEXT: vinsertf128 $1
define <8 x float> @funcC(<8 x double> %b) nounwind {
%a = fptrunc <8 x double> %b to <8 x float>
ret <8 x float> %a
}