mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-10-31 08:16:47 +00:00
47eac58333
As a first step towards real little-endian code generation, this patch changes the PowerPC MC layer to actually generate little-endian object files. This involves passing the little-endian flag through the various layers, including down to createELFObjectWriter so we actually get basic little-endian ELF objects, emitting instructions in little-endian order, and handling fixups and relocations as appropriate for little-endian. The bulk of the patch is to update most test cases in test/MC/PowerPC to verify both big- and little-endian encodings. (The only test cases *not* updated are those that create actual big-endian ABI code, like the TLS tests.) Note that while the object files are now little-endian, the generated code itself is not yet updated, in particular, it still does not adhere to the ELFv2 ABI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204634 91177308-0d34-0410-b5e6-96231b3b80d8
104 lines
2.6 KiB
ArmAsm
104 lines
2.6 KiB
ArmAsm
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# RUN: not llvm-mc -triple powerpc64-unknown-unknown < %s 2> %t
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# RUN: FileCheck < %t %s
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# RUN: not llvm-mc -triple powerpc64le-unknown-unknown < %s 2> %t
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# RUN: FileCheck < %t %s
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# Register operands
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: add 32, 32, 32
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add 32, 32, 32
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# CHECK: error: invalid register name
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# CHECK-NEXT: add %r32, %r32, %r32
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add %r32, %r32, %r32
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# TLS register operands
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: add 3, symbol@tls, 4
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add 3, symbol@tls, 4
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: subf 3, 4, symbol@tls
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subf 3, 4, symbol@tls
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# Signed 16-bit immediate operands
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: addi 1, 0, -32769
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addi 1, 0, -32769
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: addi 1, 0, 32768
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addi 1, 0, 32768
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# Unsigned 16-bit immediate operands
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: ori 1, 2, -1
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ori 1, 2, -1
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: ori 1, 2, 65536
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ori 1, 2, 65536
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# Signed 16-bit immediate operands (extended range for addis)
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# CHECK: error: invalid operand for instruction
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addis 1, 0, -65537
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# CHECK: error: invalid operand for instruction
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addis 1, 0, 65536
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# D-Form memory operands
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# CHECK: error: invalid register number
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# CHECK-NEXT: lwz 1, 0(32)
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lwz 1, 0(32)
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# CHECK: error: invalid register name
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# CHECK-NEXT: lwz 1, 0(%r32)
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lwz 1, 0(%r32)
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: lwz 1, -32769(2)
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lwz 1, -32769(2)
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: lwz 1, 32768(2)
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lwz 1, 32768(2)
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# CHECK: error: invalid register number
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# CHECK-NEXT: ld 1, 0(32)
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ld 1, 0(32)
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# CHECK: error: invalid register name
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# CHECK-NEXT: ld 1, 0(%r32)
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ld 1, 0(%r32)
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: ld 1, 1(2)
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ld 1, 1(2)
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: ld 1, 2(2)
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ld 1, 2(2)
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: ld 1, 3(2)
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ld 1, 3(2)
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: ld 1, -32772(2)
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ld 1, -32772(2)
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: ld 1, 32768(2)
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ld 1, 32768(2)
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# CHECK: error: invalid modifier 'got' (no symbols present)
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addi 4, 3, 123@got
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# CHECK-NEXT: addi 4, 3, 123@got
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