llvm-6502/test/CodeGen/NVPTX/sm-version-30.ll at f89f66e61b26974bb73b5832d5825091873b51dc - llvm-6502 - Applefritter: Git

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Justin Holewinski 08e9cb46fe [NVPTX] Add more precise PTX/SM target attributes

Each SM and PTX version is modeled as a subtarget feature/CPU. Additionally,
PTX 3.1 is added as the default PTX version to be out-of-the-box compatible
with CUDA 5.0.

Available CPUs for this target:

  sm_10 - Select the sm_10 processor.
  sm_11 - Select the sm_11 processor.
  sm_12 - Select the sm_12 processor.
  sm_13 - Select the sm_13 processor.
  sm_20 - Select the sm_20 processor.
  sm_21 - Select the sm_21 processor.
  sm_30 - Select the sm_30 processor.
  sm_35 - Select the sm_35 processor.

Available features for this target:

  ptx30 - Use PTX version 3.0.
  ptx31 - Use PTX version 3.1.
  sm_10 - Target SM 1.0.
  sm_11 - Target SM 1.1.
  sm_12 - Target SM 1.2.
  sm_13 - Target SM 1.3.
  sm_20 - Target SM 2.0.
  sm_21 - Target SM 2.1.
  sm_30 - Target SM 3.0.
  sm_35 - Target SM 3.5.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167699 91177308-0d34-0410-b5e6-96231b3b80d8

2012-11-12 03:16:43 +00:00

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 ; RUN: llc < %s -march=nvptx -mcpu=sm_30 | FileCheck %s
 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_30 | FileCheck %s
 ; CHECK: .target sm_30