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https://github.com/c64scene-ar/llvm-6502.git
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c7c7e1502a
Follows the same lines as r186686, but much more limited, since we only use ADD LOGICAL for multi-i64 additions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186689 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
777 B
LLVM
23 lines
777 B
LLVM
; Test 128-bit subtraction when the distinct-operands facility is available.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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; Test the case where both operands are in registers.
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define i64 @f1(i64 %a, i64 %b, i64 %c, i64 %d, i64 *%ptr) {
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; CHECK-LABEL: f1:
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; CHECK: slgrk %r2, %r4, %r5
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; CHECK: slbgr
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; CHECK: br %r14
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%x1 = insertelement <2 x i64> undef, i64 %b, i32 0
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%x2 = insertelement <2 x i64> %x1, i64 %c, i32 1
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%x = bitcast <2 x i64> %x2 to i128
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%y2 = insertelement <2 x i64> %x1, i64 %d, i32 1
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%y = bitcast <2 x i64> %y2 to i128
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%sub = sub i128 %x, %y
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%subv = bitcast i128 %sub to <2 x i64>
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%high = extractelement <2 x i64> %subv, i32 0
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store i64 %high, i64 *%ptr
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%low = extractelement <2 x i64> %subv, i32 1
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ret i64 %low
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}
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