mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-10-31 08:16:47 +00:00
8b2b8a1835
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
77 lines
1.4 KiB
LLVM
77 lines
1.4 KiB
LLVM
; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s
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define i32 @ashr(i32 %a, i32 %b) {
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%1 = ashr i32 %a, %b
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ret i32 %1
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}
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; CHECK-LABEL: ashr:
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; CHECK-NEXT: ashr r0, r0, r1
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define i32 @ashri1(i32 %a) {
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%1 = ashr i32 %a, 24
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ret i32 %1
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}
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; CHECK-LABEL: ashri1:
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; CHECK-NEXT: ashr r0, r0, 24
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define i32 @ashri2(i32 %a) {
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%1 = ashr i32 %a, 31
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ret i32 %1
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}
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; CHECK-LABEL: ashri2:
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; CHECK-NEXT: ashr r0, r0, 32
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define i32 @f1(i32 %a) {
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%1 = icmp slt i32 %a, 0
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br i1 %1, label %less, label %not_less
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less:
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ret i32 10
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not_less:
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ret i32 17
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}
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; CHECK-LABEL: f1:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bt r0
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define i32 @f2(i32 %a) {
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%1 = icmp sge i32 %a, 0
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br i1 %1, label %greater, label %not_greater
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greater:
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ret i32 10
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not_greater:
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ret i32 17
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}
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; CHECK-LABEL: f2:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bt r0
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define i32 @f3(i32 %a) {
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%1 = icmp slt i32 %a, 0
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%2 = select i1 %1, i32 10, i32 17
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ret i32 %2
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}
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; CHECK-LABEL: f3:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bt r0
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; CHECK-NEXT: ldc r0, 17
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; CHECK: ldc r0, 10
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define i32 @f4(i32 %a) {
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%1 = icmp sge i32 %a, 0
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%2 = select i1 %1, i32 10, i32 17
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ret i32 %2
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}
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; CHECK-LABEL: f4:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bt r0
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; CHECK-NEXT: ldc r0, 10
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; CHECK: ldc r0, 17
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define i32 @f5(i32 %a) {
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%1 = icmp sge i32 %a, 0
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%2 = zext i1 %1 to i32
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ret i32 %2
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}
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; CHECK-LABEL: f5:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: eq r0, r0, 0
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