Chris Lattner f9568d8700 Don't diddle VRSAVE if no registers need to be added/removed from it. This ... allows us to codegen functions as: _test_rol: vspltisw v2, -12 vrlw v2, v2, v2 blr instead of: _test_rol: mfvrsave r2, 256 mr r3, r2 mtvrsave r3 vspltisw v2, -12 vrlw v2, v2, v2 mtvrsave r2 blr Testcase here: CodeGen/PowerPC/vec_vrsave.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27777 91177308-0d34-0410-b5e6-96231b3b80d8		2006-04-17 21:48:13 +00:00
..
Analysis	Implement value #'ing for vector operations, implementing	2006-04-14 05:10:20 +00:00
Archive
AsmParser	Make sure CVS versions of yacc and lex files get distributed.	2006-04-12 20:57:05 +00:00
Bytecode	use isValidOperands instead of duplicating checks	2006-04-08 04:09:19 +00:00
CodeGen	Add a MachineInstr::eraseFromParent convenience method.	2006-04-17 21:35:41 +00:00
Debugger	Add the README files to the distribution.	2006-04-13 06:39:24 +00:00
ExecutionEngine	Get JIT/Interpreter working on Windows again.	2006-03-24 02:53:49 +00:00
Linker	Add shufflevector support	2006-04-08 01:19:47 +00:00
Support	Qualify dwarf namespace inside llvm namespace.	2006-02-27 22:37:23 +00:00
System	Add checks for __OpenBSD__.	2006-04-17 17:55:41 +00:00
Target	Don't diddle VRSAVE if no registers need to be added/removed from it. This	2006-04-17 21:48:13 +00:00
Transforms	Fix a bug in the 'shuffle(undef,x,mask) -> shuffle(x, undef,mask')' xform	2006-04-16 00:51:47 +00:00
VMCore	Move these ctors out of line	2006-04-14 22:20:32 +00:00
Makefile