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30e89dd882
instructions which happen to have a constant mask. Currently, this only handles a very narrow set of cases, but those happen to be the cases that I care about for testing shuffles sanely. This is a bit trickier than other shuffle instructions because we're decoding constants out of the constant pool. The current MC layer makes it completely impossible to inspect a constant pool entry, so we have to do it at the MI level and attach the comment to the streamer on its way out. So no joy for disassembling, but it does make test cases and asm dumps *much* nicer. Sorry for no test cases, but it didn't really seem that valuable to go trolling through existing old test cases and updating them. I'll have lots of testing of this in the upcoming patch for SSSE3 emission in the new vector shuffle lowering code paths. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213986 91177308-0d34-0410-b5e6-96231b3b80d8
76 lines
2.7 KiB
C++
76 lines
2.7 KiB
C++
//===-- X86ShuffleDecode.h - X86 shuffle decode logic -----------*-C++-*---===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Define several functions to decode x86 specific shuffle semantics into a
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// generic vector mask.
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//
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//===----------------------------------------------------------------------===//
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#ifndef X86_SHUFFLE_DECODE_H
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#define X86_SHUFFLE_DECODE_H
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#include "llvm/ADT/SmallVector.h"
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//===----------------------------------------------------------------------===//
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// Vector Mask Decoding
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//===----------------------------------------------------------------------===//
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namespace llvm {
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class ConstantDataSequential;
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class MVT;
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enum {
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SM_SentinelZero = -1
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};
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void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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// <3,1> or <6,7,2,3>
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void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask);
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// <0,2> or <0,1,4,5>
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void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask);
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void DecodePALIGNRMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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void DecodePSHUFHWMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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void DecodePSHUFLWMask(MVT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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/// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates
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/// the type of the vector allowing it to handle different datatypes and vector
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/// widths.
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void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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/// DecodeUNPCKHMask - This decodes the shuffle masks for unpckhps/unpckhpd
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/// and punpckh*. VT indicates the type of the vector allowing it to handle
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/// different datatypes and vector widths.
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void DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
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/// DecodeUNPCKLMask - This decodes the shuffle masks for unpcklps/unpcklpd
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/// and punpckl*. VT indicates the type of the vector allowing it to handle
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/// different datatypes and vector widths.
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void DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
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void DecodePSHUFBMask(const ConstantDataSequential *C,
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SmallVectorImpl<int> &ShuffleMask);
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void DecodeVPERM2X128Mask(MVT VT, unsigned Imm,
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SmallVectorImpl<int> &ShuffleMask);
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/// DecodeVPERMMask - this decodes the shuffle masks for VPERMQ/VPERMPD.
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/// No VT provided since it only works on 256-bit, 4 element vectors.
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void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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} // llvm namespace
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#endif
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