Richard Sandiford f9a5e40b90 Replace sra with srl if a single sign bit is required ...

E.g. (and (sra (i32 x) 31) 2) -> (and (srl (i32 x) 30) 2).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192884 91177308-0d34-0410-b5e6-96231b3b80d8

2013-10-17 11:16:57 +00:00

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Analysis

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Assembler

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Bindings/Ocaml

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Bitcode

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BugPoint

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CodeGen

Replace sra with srl if a single sign bit is required

2013-10-17 11:16:57 +00:00

DebugInfo

Changing DebugInfoFinder to iterate over all the compile units.

2013-10-17 10:27:12 +00:00

ExecutionEngine

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Feature

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FileCheck

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Instrumentation

tsan: implement no_sanitize_thread attribute

2013-10-17 07:20:06 +00:00

Integer

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JitListener

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Linker

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LTO

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MC

Re-commit r192758 - MC: quote tricky symbol names in asm output

2013-10-17 01:13:02 +00:00

Object

Create an atom with just the data that failed to disassemble.

2013-10-16 19:03:14 +00:00

Other

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TableGen

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tools

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Transforms

SLPVectorizer: Don't vectorize volatile memory operations

2013-10-16 17:52:40 +00:00

Unit

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Verifier

Add support for metadata representing .ident directives.

2013-10-16 01:49:05 +00:00

YAMLParser

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CMakeLists.txt

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lit.cfg

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lit.site.cfg.in

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Makefile

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Makefile.tests

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TestRunner.sh

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