Silviu Baranga fa1ebc6abe Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the disassembler. Since the upredicability conditions are complex, C++ code was added to handle them. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155001 91177308-0d34-0410-b5e6-96231b3b80d8		2012-04-18 13:12:50 +00:00
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ARM	ARM two-operand forms for vhadd and vhsub instructions.	2012-04-16 23:00:25 +00:00
AsmParser	MC assembly parser handling for trailing comma in macro instantiation.	2012-04-16 21:18:49 +00:00
COFF
Disassembler	Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the disassembler. Since the upredicability conditions are complex, C++ code was added to handle them.	2012-04-18 13:12:50 +00:00
ELF
MachO
MBlaze
Mips	This patch fixes 3 problems:	2012-04-16 18:20:26 +00:00
X86	Add retw and lretw instructions. Also, fix Intel syntax parsing for all	2012-04-11 01:10:53 +00:00