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fa210acc3b12fc651252de566bb6e3381d9a3097
llvm-6502/test/MC/Mips/mips32
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Daniel Sanders 5535fca8bf Revert: r215698 - Current implementation of c.cond.fmt instructions only accept default cc0 register...
It causes a number of regressions when -fintegrated-as is enabled. This happens
because there are codegen-only instructions that incorrectly uses the first
operand as the encoding for the $fcc register. The regressions do not occur when
-via-file-asm is also given.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215847 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 19:47:47 +00:00
..
abiflags.s
Re-commit: [mips] Correct section alignments and EntrySizes for .bss, .text, .data, .reginfo, .MIPS.options, and .MIPS.abiflags
2014-07-14 15:05:51 +00:00
invalid-mips32r2-xfail.s
[mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them
2014-05-13 11:45:36 +00:00
invalid-mips32r2.s
[mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them
2014-05-13 11:45:36 +00:00
invalid-mips64.s
[mips] Fold FeatureBitCount into FeatureMips32 and FeatureMips64
2014-05-12 12:41:59 +00:00
valid-xfail.s
Revert: r215698 - Current implementation of c.cond.fmt instructions only accept default cc0 register...
2014-08-17 19:47:47 +00:00
valid.s
Revert: r215698 - Current implementation of c.cond.fmt instructions only accept default cc0 register...
2014-08-17 19:47:47 +00:00
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