mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-10-30 16:17:05 +00:00
ccc83e4a08
Consider this function from our README.txt file:
int foo(int a, int b) { return (a < b) << 4; }
We now explicitly track CR bits by default, so the comment in the README.txt
about not really having a SETCC is no longer accurate, but we did generate this
somewhat silly code:
cmpw 0, 3, 4
li 3, 0
li 12, 1
isel 3, 12, 3, 0
sldi 3, 3, 4
blr
which generates the zext as a select between 0 and 1, and then shifts the
result by a constant amount. Here we preprocess the DAG in order to fold the
results of operations on an extension of an i1 value into the SELECT_I[48]
pseudo instruction when the resulting constant can be materialized using one
instruction (just like the 0 and 1). This was not implemented as a DAGCombine
because the resulting code would have been anti-canonical and depends on
replacing chained user nodes, which does not fit well into the lowering
paradigm. Now we generate:
cmpw 0, 3, 4
li 3, 0
li 12, 16
isel 3, 12, 3, 0
blr
which is less silly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225203 91177308-0d34-0410-b5e6-96231b3b80d8
55 lines
1.3 KiB
LLVM
55 lines
1.3 KiB
LLVM
; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
|
|
target datalayout = "E-m:e-i64:64-n32:64"
|
|
target triple = "powerpc64-unknown-linux-gnu"
|
|
|
|
; Function Attrs: nounwind readnone
|
|
define signext i32 @foo(i32 signext %a, i32 signext %b) #0 {
|
|
entry:
|
|
%cmp = icmp slt i32 %a, %b
|
|
%conv = zext i1 %cmp to i32
|
|
%shl = shl nuw nsw i32 %conv, 4
|
|
ret i32 %shl
|
|
|
|
; CHECK-LABEL: @foo
|
|
; CHECK-DAG: cmpw
|
|
; CHECK-DAG: li [[REG1:[0-9]+]], 0
|
|
; CHECK-DAG: li [[REG2:[0-9]+]], 16
|
|
; CHECK: isel 3, [[REG2]], [[REG1]],
|
|
; CHECK: blr
|
|
}
|
|
|
|
; Function Attrs: nounwind readnone
|
|
define signext i32 @foo2(i32 signext %a, i32 signext %b) #0 {
|
|
entry:
|
|
%cmp = icmp slt i32 %a, %b
|
|
%conv = zext i1 %cmp to i32
|
|
%shl = shl nuw nsw i32 %conv, 4
|
|
%add1 = or i32 %shl, 5
|
|
ret i32 %add1
|
|
|
|
; CHECK-LABEL: @foo2
|
|
; CHECK-DAG: cmpw
|
|
; CHECK-DAG: li [[REG1:[0-9]+]], 5
|
|
; CHECK-DAG: li [[REG2:[0-9]+]], 21
|
|
; CHECK: isel 3, [[REG2]], [[REG1]],
|
|
; CHECK: blr
|
|
}
|
|
|
|
; Function Attrs: nounwind readnone
|
|
define signext i32 @foo3(i32 signext %a, i32 signext %b) #0 {
|
|
entry:
|
|
%cmp = icmp sle i32 %a, %b
|
|
%conv = zext i1 %cmp to i32
|
|
%shl = shl nuw nsw i32 %conv, 4
|
|
ret i32 %shl
|
|
|
|
; CHECK-LABEL: @foo3
|
|
; CHECK-DAG: cmpw
|
|
; CHECK-DAG: li [[REG1:[0-9]+]], 16
|
|
; CHECK: isel 3, 0, [[REG1]],
|
|
; CHECK: blr
|
|
}
|
|
|
|
attributes #0 = { nounwind readnone }
|
|
|