mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-11-03 14:21:30 +00:00
5a70dd1d82
Similar to gep (r230786) and load (r230794) changes.
Similar migration script can be used to update test cases, which
successfully migrated all of LLVM and Polly, but about 4 test cases
needed manually changes in Clang.
(this script will read the contents of stdin and massage it into stdout
- wrap it in the 'apply.sh' script shown in previous commits + xargs to
apply it over a large set of test cases)
import fileinput
import sys
import re
rep = re.compile(r"(getelementptr(?:\s+inbounds)?\s*\()((<\d*\s+x\s+)?([^@]*?)(|\s*addrspace\(\d+\))\s*\*(?(3)>)\s*)(?=$|%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|zeroinitializer|<|\[\[[a-zA-Z]|\{\{)", re.MULTILINE | re.DOTALL)
def conv(match):
line = match.group(1)
line += match.group(4)
line += ", "
line += match.group(2)
return line
line = sys.stdin.read()
off = 0
for match in re.finditer(rep, line):
sys.stdout.write(line[off:match.start()])
sys.stdout.write(conv(match))
off = match.end()
sys.stdout.write(line[off:])
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232184 91177308-0d34-0410-b5e6-96231b3b80d8
118 lines
5.9 KiB
LLVM
118 lines
5.9 KiB
LLVM
;RUN: llc < %s -march=r600 -mcpu=cayman
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define void @main(<4 x float> inreg %reg0, <4 x float> inreg %reg1, <4 x float> inreg %reg2, <4 x float> inreg %reg3) #0 {
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main_body:
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%0 = extractelement <4 x float> %reg1, i32 0
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%1 = extractelement <4 x float> %reg1, i32 1
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%2 = extractelement <4 x float> %reg1, i32 2
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%3 = extractelement <4 x float> %reg1, i32 3
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%4 = extractelement <4 x float> %reg2, i32 0
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%5 = extractelement <4 x float> %reg2, i32 1
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%6 = extractelement <4 x float> %reg2, i32 2
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%7 = extractelement <4 x float> %reg2, i32 3
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%8 = extractelement <4 x float> %reg3, i32 0
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%9 = extractelement <4 x float> %reg3, i32 1
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%10 = extractelement <4 x float> %reg3, i32 2
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%11 = extractelement <4 x float> %reg3, i32 3
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%12 = load <4 x float>, <4 x float> addrspace(8)* null
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%13 = extractelement <4 x float> %12, i32 0
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%14 = fmul float %0, %13
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%15 = load <4 x float>, <4 x float> addrspace(8)* null
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%16 = extractelement <4 x float> %15, i32 1
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%17 = fmul float %0, %16
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%18 = load <4 x float>, <4 x float> addrspace(8)* null
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%19 = extractelement <4 x float> %18, i32 2
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%20 = fmul float %0, %19
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%21 = load <4 x float>, <4 x float> addrspace(8)* null
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%22 = extractelement <4 x float> %21, i32 3
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%23 = fmul float %0, %22
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%24 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
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%25 = extractelement <4 x float> %24, i32 0
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%26 = fmul float %1, %25
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%27 = fadd float %26, %14
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%28 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
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%29 = extractelement <4 x float> %28, i32 1
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%30 = fmul float %1, %29
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%31 = fadd float %30, %17
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%32 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
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%33 = extractelement <4 x float> %32, i32 2
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%34 = fmul float %1, %33
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%35 = fadd float %34, %20
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%36 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
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%37 = extractelement <4 x float> %36, i32 3
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%38 = fmul float %1, %37
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%39 = fadd float %38, %23
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%40 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
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%41 = extractelement <4 x float> %40, i32 0
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%42 = fmul float %2, %41
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%43 = fadd float %42, %27
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%44 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
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%45 = extractelement <4 x float> %44, i32 1
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%46 = fmul float %2, %45
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%47 = fadd float %46, %31
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%48 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
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%49 = extractelement <4 x float> %48, i32 2
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%50 = fmul float %2, %49
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%51 = fadd float %50, %35
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%52 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
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%53 = extractelement <4 x float> %52, i32 3
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%54 = fmul float %2, %53
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%55 = fadd float %54, %39
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%56 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
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%57 = extractelement <4 x float> %56, i32 0
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%58 = fmul float %3, %57
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%59 = fadd float %58, %43
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%60 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
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%61 = extractelement <4 x float> %60, i32 1
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%62 = fmul float %3, %61
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%63 = fadd float %62, %47
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%64 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
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%65 = extractelement <4 x float> %64, i32 2
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%66 = fmul float %3, %65
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%67 = fadd float %66, %51
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%68 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
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%69 = extractelement <4 x float> %68, i32 3
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%70 = fmul float %3, %69
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%71 = fadd float %70, %55
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%72 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
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%73 = extractelement <4 x float> %72, i32 0
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%74 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
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%75 = extractelement <4 x float> %74, i32 1
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%76 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
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%77 = extractelement <4 x float> %76, i32 2
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%78 = insertelement <4 x float> undef, float %4, i32 0
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%79 = insertelement <4 x float> %78, float %5, i32 1
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%80 = insertelement <4 x float> %79, float %6, i32 2
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%81 = insertelement <4 x float> %80, float 0.000000e+00, i32 3
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%82 = insertelement <4 x float> undef, float %73, i32 0
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%83 = insertelement <4 x float> %82, float %75, i32 1
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%84 = insertelement <4 x float> %83, float %77, i32 2
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%85 = insertelement <4 x float> %84, float 0.000000e+00, i32 3
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%86 = call float @llvm.AMDGPU.dp4(<4 x float> %81, <4 x float> %85)
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%87 = insertelement <4 x float> undef, float %86, i32 0
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call void @llvm.R600.store.swizzle(<4 x float> %87, i32 2, i32 2)
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ret void
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}
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; Function Attrs: readnone
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declare float @llvm.AMDGPU.dp4(<4 x float>, <4 x float>) #1
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; Function Attrs: readonly
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declare float @fabs(float) #2
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; Function Attrs: readnone
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declare float @llvm.AMDGPU.rsq(float) #1
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; Function Attrs: readnone
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declare float @llvm.AMDIL.clamp.(float, float, float) #1
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; Function Attrs: nounwind readonly
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declare float @llvm.pow.f32(float, float) #3
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declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
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attributes #0 = { "ShaderType"="1" }
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attributes #1 = { readnone }
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attributes #2 = { readonly }
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attributes #3 = { nounwind readonly }
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