Files
llvm-6502/test/CodeGen/X86/avx-logic.ll
Sanjay Patel 62dd074fe9 use update_llc_test_checks.py to tighten checking in these tests
1. There were no CHECK-LABELs, so we could match instructions from the wrong function.
2. The use of zero operands meant multiple xor instructions could match some CHECKs.
3. The test was over-specified to need a Sandybridge CPU and Darwin triple.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233198 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-25 17:34:11 +00:00

9.9 KiB