mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-10-31 08:16:47 +00:00
5a70dd1d82
Similar to gep (r230786) and load (r230794) changes.
Similar migration script can be used to update test cases, which
successfully migrated all of LLVM and Polly, but about 4 test cases
needed manually changes in Clang.
(this script will read the contents of stdin and massage it into stdout
- wrap it in the 'apply.sh' script shown in previous commits + xargs to
apply it over a large set of test cases)
import fileinput
import sys
import re
rep = re.compile(r"(getelementptr(?:\s+inbounds)?\s*\()((<\d*\s+x\s+)?([^@]*?)(|\s*addrspace\(\d+\))\s*\*(?(3)>)\s*)(?=$|%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|zeroinitializer|<|\[\[[a-zA-Z]|\{\{)", re.MULTILINE | re.DOTALL)
def conv(match):
line = match.group(1)
line += match.group(4)
line += ", "
line += match.group(2)
return line
line = sys.stdin.read()
off = 0
for match in re.finditer(rep, line):
sys.stdout.write(line[off:match.start()])
sys.stdout.write(conv(match))
off = match.end()
sys.stdout.write(line[off:])
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232184 91177308-0d34-0410-b5e6-96231b3b80d8
92 lines
3.2 KiB
LLVM
92 lines
3.2 KiB
LLVM
; RUN: opt -basicaa -loop-idiom < %s -S | FileCheck %s
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target datalayout = "e-p:32:32:32-p1:64:64:64-p2:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-n8:16:32:64"
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target triple = "x86_64-apple-darwin10.0.0"
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; Two dimensional nested loop should be promoted to one big memset.
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define void @test10(i8 addrspace(2)* %X) nounwind ssp {
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; CHECK-LABEL: @test10(
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; CHECK: entry:
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; CHECK-NEXT: call void @llvm.memset.p2i8.i16(i8 addrspace(2)* %X, i8 0, i16 10000, i32 1, i1 false)
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; CHECK-NOT: store
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; CHECK: ret void
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entry:
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br label %bb.nph
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bb.nph: ; preds = %entry, %for.inc10
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%i.04 = phi i16 [ 0, %entry ], [ %inc12, %for.inc10 ]
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br label %for.body5
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for.body5: ; preds = %for.body5, %bb.nph
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%j.02 = phi i16 [ 0, %bb.nph ], [ %inc, %for.body5 ]
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%mul = mul nsw i16 %i.04, 100
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%add = add nsw i16 %j.02, %mul
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%arrayidx = getelementptr inbounds i8, i8 addrspace(2)* %X, i16 %add
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store i8 0, i8 addrspace(2)* %arrayidx, align 1
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%inc = add nsw i16 %j.02, 1
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%cmp4 = icmp eq i16 %inc, 100
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br i1 %cmp4, label %for.inc10, label %for.body5
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for.inc10: ; preds = %for.body5
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%inc12 = add nsw i16 %i.04, 1
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%cmp = icmp eq i16 %inc12, 100
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br i1 %cmp, label %for.end13, label %bb.nph
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for.end13: ; preds = %for.inc10
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ret void
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}
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define void @test11_pattern(i32 addrspace(2)* nocapture %P) nounwind ssp {
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; CHECK-LABEL: @test11_pattern(
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; CHECK-NOT: memset_pattern
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.body
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%indvar = phi i64 [ 0, %entry ], [ %indvar.next, %for.body ]
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%arrayidx = getelementptr i32, i32 addrspace(2)* %P, i64 %indvar
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store i32 1, i32 addrspace(2)* %arrayidx, align 4
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%indvar.next = add i64 %indvar, 1
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%exitcond = icmp eq i64 %indvar.next, 10000
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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ret void
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}
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; PR9815 - This is a partial overlap case that cannot be safely transformed
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; into a memcpy.
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@g_50 = addrspace(2) global [7 x i32] [i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0], align 16
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define i32 @test14() nounwind {
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; CHECK-LABEL: @test14(
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; CHECK: for.body:
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; CHECK: load i32
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; CHECK: store i32
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; CHECK: br i1 %cmp
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entry:
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br label %for.body
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for.body: ; preds = %for.inc, %for.body.lr.ph
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%tmp5 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
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%add = add nsw i32 %tmp5, 4
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%idxprom = sext i32 %add to i64
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%arrayidx = getelementptr inbounds [7 x i32], [7 x i32] addrspace(2)* @g_50, i32 0, i64 %idxprom
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%tmp2 = load i32, i32 addrspace(2)* %arrayidx, align 4
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%add4 = add nsw i32 %tmp5, 5
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%idxprom5 = sext i32 %add4 to i64
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%arrayidx6 = getelementptr inbounds [7 x i32], [7 x i32] addrspace(2)* @g_50, i32 0, i64 %idxprom5
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store i32 %tmp2, i32 addrspace(2)* %arrayidx6, align 4
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%inc = add nsw i32 %tmp5, 1
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%cmp = icmp slt i32 %inc, 2
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br i1 %cmp, label %for.body, label %for.end
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for.end: ; preds = %for.inc
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%tmp8 = load i32, i32 addrspace(2)* getelementptr inbounds ([7 x i32], [7 x i32] addrspace(2)* @g_50, i32 0, i64 6), align 4
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ret i32 %tmp8
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}
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