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https://github.com/c64scene-ar/llvm-6502.git
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561c44fc33
One code change and several test changes to match that details in http://reviews.llvm.org/D9481 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237150 91177308-0d34-0410-b5e6-96231b3b80d8
189 lines
5.2 KiB
LLVM
189 lines
5.2 KiB
LLVM
; RUN: opt -lowerswitch -S < %s | FileCheck %s
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; Test that we don't crash and have a different basic block for each incoming edge.
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define void @test0() {
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; CHECK-LABEL: @test0
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; CHECK: %merge = phi i64 [ 1, %BB3 ], [ 0, %NewDefault ], [ 0, %NodeBlock.5 ], [ 0, %LeafBlock.1 ]
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BB1:
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switch i32 undef, label %BB2 [
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i32 3, label %BB2
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i32 5, label %BB2
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i32 0, label %BB3
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i32 2, label %BB3
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i32 4, label %BB3
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]
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BB2:
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%merge = phi i64 [ 1, %BB3 ], [ 0, %BB1 ], [ 0, %BB1 ], [ 0, %BB1 ]
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ret void
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BB3:
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br label %BB2
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}
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; Test switch cases that are merged into a single case during lowerswitch
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; (take 84 and 85 below) - check that the number of incoming phi values match
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; the number of branches.
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define void @test1() {
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; CHECK-LABEL: @test1
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entry:
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br label %bb1
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bb1:
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switch i32 undef, label %bb1 [
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i32 84, label %bb3
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i32 85, label %bb3
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i32 86, label %bb2
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i32 78, label %exit
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i32 99, label %bb3
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]
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bb2:
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br label %bb3
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bb3:
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; CHECK-LABEL: bb3
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; CHECK: %tmp = phi i32 [ 1, %NodeBlock ], [ 0, %bb2 ], [ 1, %LeafBlock.3 ]
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%tmp = phi i32 [ 1, %bb1 ], [ 0, %bb2 ], [ 1, %bb1 ], [ 1, %bb1 ]
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; CHECK-NEXT: %tmp2 = phi i32 [ 2, %NodeBlock ], [ 5, %bb2 ], [ 2, %LeafBlock.3 ]
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%tmp2 = phi i32 [ 2, %bb1 ], [ 2, %bb1 ], [ 5, %bb2 ], [ 2, %bb1 ]
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br label %exit
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exit:
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ret void
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}
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; Test that we don't crash.
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define void @test2(i32 %mode) {
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; CHECK-LABEL: @test2
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br i1 undef, label %1, label %._crit_edge
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; <label>:1 ; preds = %0
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switch i32 %mode, label %33 [
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i32 2, label %2
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i32 3, label %3
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i32 4, label %4
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i32 5, label %5
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i32 6, label %6
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i32 7, label %7
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i32 8, label %8
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i32 9, label %9
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i32 10, label %10
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i32 11, label %14
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i32 12, label %18
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i32 13, label %22
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i32 14, label %26
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i32 15, label %27
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i32 16, label %34
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i32 17, label %34
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i32 18, label %34
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i32 19, label %34
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i32 22, label %34
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i32 20, label %31
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i32 21, label %32
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]
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; <label>:2 ; preds = %1
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br label %34
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; <label>:3 ; preds = %1
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br label %34
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; <label>:4 ; preds = %1
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br label %34
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; <label>:5 ; preds = %1
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br label %34
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; <label>:6 ; preds = %1
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br label %34
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; <label>:7 ; preds = %1
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br label %34
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; <label>:8 ; preds = %1
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br label %34
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; <label>:9 ; preds = %1
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br label %34
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; <label>:10 ; preds = %1
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br i1 undef, label %11, label %12
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; <label>:11 ; preds = %10
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br label %13
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; <label>:12 ; preds = %10
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br label %13
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; <label>:13 ; preds = %12, %11
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br label %34
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; <label>:14 ; preds = %1
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br i1 undef, label %15, label %16
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; <label>:15 ; preds = %14
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br label %17
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; <label>:16 ; preds = %14
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br label %17
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; <label>:17 ; preds = %16, %15
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br label %34
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; <label>:18 ; preds = %1
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br i1 undef, label %19, label %20
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; <label>:19 ; preds = %18
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br label %21
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; <label>:20 ; preds = %18
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br label %21
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; <label>:21 ; preds = %20, %19
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br label %34
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; <label>:22 ; preds = %1
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br i1 undef, label %23, label %24
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; <label>:23 ; preds = %22
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br label %25
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; <label>:24 ; preds = %22
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br label %25
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; <label>:25 ; preds = %24, %23
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br label %34
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; <label>:26 ; preds = %1
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br label %34
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; <label>:27 ; preds = %1
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br i1 undef, label %28, label %29
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; <label>:28 ; preds = %27
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br label %30
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; <label>:29 ; preds = %27
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br label %30
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; <label>:30 ; preds = %29, %28
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br label %34
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; <label>:31 ; preds = %1
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br label %34
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; <label>:32 ; preds = %1
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br label %34
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; <label>:33 ; preds = %1
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br label %34
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; <label>:34 ; preds = %33, %32, %31, %30, %26, %25, %21, %17, %13, %9, %8, %7, %6, %5, %4, %3, %2, %1, %1, %1, %1, %1
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%o.0 = phi float [ undef, %33 ], [ undef, %32 ], [ undef, %31 ], [ undef, %30 ], [ undef, %26 ], [ undef, %25 ], [ undef, %21 ], [ undef, %17 ], [ undef, %13 ], [ undef, %9 ], [ undef, %8 ], [ undef, %7 ], [ undef, %6 ], [ undef, %5 ], [ undef, %4 ], [ undef, %3 ], [ undef, %2 ], [ undef, %1 ], [ undef, %1 ], [ undef, %1 ], [ undef, %1 ], [ undef, %1 ]
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br label %._crit_edge
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._crit_edge: ; preds = %34, %0
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ret void
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}
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