mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-11-03 14:21:30 +00:00
ae43cab6ba
Sweep the codebase for common typos. Includes some changes to visible function names that were misspelt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200018 91177308-0d34-0410-b5e6-96231b3b80d8
705 lines
19 KiB
C
705 lines
19 KiB
C
/*===-- X86DisassemblerDecoderInternal.h - Disassembler decoder ---*- C -*-===*
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*
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* The LLVM Compiler Infrastructure
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*
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* This file is distributed under the University of Illinois Open Source
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* License. See LICENSE.TXT for details.
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*
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*===----------------------------------------------------------------------===*
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*
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* This file is part of the X86 Disassembler.
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* It contains the public interface of the instruction decoder.
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* Documentation for the disassembler can be found in X86Disassembler.h.
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*
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*===----------------------------------------------------------------------===*/
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#ifndef X86DISASSEMBLERDECODER_H
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#define X86DISASSEMBLERDECODER_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define INSTRUCTION_SPECIFIER_FIELDS \
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uint16_t operands;
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#define INSTRUCTION_IDS \
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uint16_t instructionIDs;
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#include "X86DisassemblerDecoderCommon.h"
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#undef INSTRUCTION_SPECIFIER_FIELDS
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#undef INSTRUCTION_IDS
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/*
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* Accessor functions for various fields of an Intel instruction
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*/
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#define modFromModRM(modRM) (((modRM) & 0xc0) >> 6)
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#define regFromModRM(modRM) (((modRM) & 0x38) >> 3)
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#define rmFromModRM(modRM) ((modRM) & 0x7)
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#define scaleFromSIB(sib) (((sib) & 0xc0) >> 6)
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#define indexFromSIB(sib) (((sib) & 0x38) >> 3)
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#define baseFromSIB(sib) ((sib) & 0x7)
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#define wFromREX(rex) (((rex) & 0x8) >> 3)
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#define rFromREX(rex) (((rex) & 0x4) >> 2)
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#define xFromREX(rex) (((rex) & 0x2) >> 1)
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#define bFromREX(rex) ((rex) & 0x1)
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#define rFromEVEX2of4(evex) (((~(evex)) & 0x80) >> 7)
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#define xFromEVEX2of4(evex) (((~(evex)) & 0x40) >> 6)
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#define bFromEVEX2of4(evex) (((~(evex)) & 0x20) >> 5)
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#define r2FromEVEX2of4(evex) (((~(evex)) & 0x10) >> 4)
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#define mmFromEVEX2of4(evex) ((evex) & 0x3)
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#define wFromEVEX3of4(evex) (((evex) & 0x80) >> 7)
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#define vvvvFromEVEX3of4(evex) (((~(evex)) & 0x78) >> 3)
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#define ppFromEVEX3of4(evex) ((evex) & 0x3)
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#define zFromEVEX4of4(evex) (((evex) & 0x80) >> 7)
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#define l2FromEVEX4of4(evex) (((evex) & 0x40) >> 6)
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#define lFromEVEX4of4(evex) (((evex) & 0x20) >> 5)
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#define bFromEVEX4of4(evex) (((evex) & 0x10) >> 4)
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#define v2FromEVEX4of4(evex) (((~evex) & 0x8) >> 3)
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#define aaaFromEVEX4of4(evex) ((evex) & 0x7)
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#define rFromVEX2of3(vex) (((~(vex)) & 0x80) >> 7)
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#define xFromVEX2of3(vex) (((~(vex)) & 0x40) >> 6)
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#define bFromVEX2of3(vex) (((~(vex)) & 0x20) >> 5)
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#define mmmmmFromVEX2of3(vex) ((vex) & 0x1f)
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#define wFromVEX3of3(vex) (((vex) & 0x80) >> 7)
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#define vvvvFromVEX3of3(vex) (((~(vex)) & 0x78) >> 3)
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#define lFromVEX3of3(vex) (((vex) & 0x4) >> 2)
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#define ppFromVEX3of3(vex) ((vex) & 0x3)
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#define rFromVEX2of2(vex) (((~(vex)) & 0x80) >> 7)
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#define vvvvFromVEX2of2(vex) (((~(vex)) & 0x78) >> 3)
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#define lFromVEX2of2(vex) (((vex) & 0x4) >> 2)
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#define ppFromVEX2of2(vex) ((vex) & 0x3)
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#define rFromXOP2of3(xop) (((~(xop)) & 0x80) >> 7)
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#define xFromXOP2of3(xop) (((~(xop)) & 0x40) >> 6)
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#define bFromXOP2of3(xop) (((~(xop)) & 0x20) >> 5)
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#define mmmmmFromXOP2of3(xop) ((xop) & 0x1f)
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#define wFromXOP3of3(xop) (((xop) & 0x80) >> 7)
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#define vvvvFromXOP3of3(vex) (((~(vex)) & 0x78) >> 3)
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#define lFromXOP3of3(xop) (((xop) & 0x4) >> 2)
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#define ppFromXOP3of3(xop) ((xop) & 0x3)
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/*
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* These enums represent Intel registers for use by the decoder.
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*/
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#define REGS_8BIT \
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ENTRY(AL) \
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ENTRY(CL) \
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ENTRY(DL) \
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ENTRY(BL) \
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ENTRY(AH) \
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ENTRY(CH) \
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ENTRY(DH) \
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ENTRY(BH) \
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ENTRY(R8B) \
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ENTRY(R9B) \
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ENTRY(R10B) \
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ENTRY(R11B) \
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ENTRY(R12B) \
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ENTRY(R13B) \
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ENTRY(R14B) \
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ENTRY(R15B) \
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ENTRY(SPL) \
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ENTRY(BPL) \
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ENTRY(SIL) \
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ENTRY(DIL)
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#define EA_BASES_16BIT \
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ENTRY(BX_SI) \
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ENTRY(BX_DI) \
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ENTRY(BP_SI) \
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ENTRY(BP_DI) \
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ENTRY(SI) \
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ENTRY(DI) \
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ENTRY(BP) \
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ENTRY(BX) \
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ENTRY(R8W) \
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ENTRY(R9W) \
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ENTRY(R10W) \
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ENTRY(R11W) \
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ENTRY(R12W) \
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ENTRY(R13W) \
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ENTRY(R14W) \
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ENTRY(R15W)
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#define REGS_16BIT \
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ENTRY(AX) \
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ENTRY(CX) \
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ENTRY(DX) \
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ENTRY(BX) \
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ENTRY(SP) \
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ENTRY(BP) \
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ENTRY(SI) \
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ENTRY(DI) \
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ENTRY(R8W) \
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ENTRY(R9W) \
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ENTRY(R10W) \
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ENTRY(R11W) \
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ENTRY(R12W) \
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ENTRY(R13W) \
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ENTRY(R14W) \
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ENTRY(R15W)
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#define EA_BASES_32BIT \
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ENTRY(EAX) \
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ENTRY(ECX) \
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ENTRY(EDX) \
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ENTRY(EBX) \
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ENTRY(sib) \
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ENTRY(EBP) \
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ENTRY(ESI) \
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ENTRY(EDI) \
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ENTRY(R8D) \
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ENTRY(R9D) \
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ENTRY(R10D) \
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ENTRY(R11D) \
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ENTRY(R12D) \
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ENTRY(R13D) \
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ENTRY(R14D) \
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ENTRY(R15D)
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#define REGS_32BIT \
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ENTRY(EAX) \
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ENTRY(ECX) \
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ENTRY(EDX) \
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ENTRY(EBX) \
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ENTRY(ESP) \
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ENTRY(EBP) \
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ENTRY(ESI) \
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ENTRY(EDI) \
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ENTRY(R8D) \
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ENTRY(R9D) \
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ENTRY(R10D) \
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ENTRY(R11D) \
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ENTRY(R12D) \
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ENTRY(R13D) \
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ENTRY(R14D) \
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ENTRY(R15D)
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#define EA_BASES_64BIT \
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ENTRY(RAX) \
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ENTRY(RCX) \
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ENTRY(RDX) \
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ENTRY(RBX) \
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ENTRY(sib64) \
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ENTRY(RBP) \
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ENTRY(RSI) \
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ENTRY(RDI) \
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ENTRY(R8) \
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ENTRY(R9) \
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ENTRY(R10) \
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ENTRY(R11) \
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ENTRY(R12) \
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ENTRY(R13) \
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ENTRY(R14) \
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ENTRY(R15)
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#define REGS_64BIT \
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ENTRY(RAX) \
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ENTRY(RCX) \
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ENTRY(RDX) \
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ENTRY(RBX) \
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ENTRY(RSP) \
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ENTRY(RBP) \
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ENTRY(RSI) \
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ENTRY(RDI) \
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ENTRY(R8) \
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ENTRY(R9) \
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ENTRY(R10) \
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ENTRY(R11) \
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ENTRY(R12) \
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ENTRY(R13) \
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ENTRY(R14) \
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ENTRY(R15)
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#define REGS_MMX \
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ENTRY(MM0) \
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ENTRY(MM1) \
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ENTRY(MM2) \
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ENTRY(MM3) \
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ENTRY(MM4) \
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ENTRY(MM5) \
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ENTRY(MM6) \
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ENTRY(MM7)
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#define REGS_XMM \
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ENTRY(XMM0) \
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ENTRY(XMM1) \
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ENTRY(XMM2) \
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ENTRY(XMM3) \
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ENTRY(XMM4) \
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ENTRY(XMM5) \
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ENTRY(XMM6) \
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ENTRY(XMM7) \
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ENTRY(XMM8) \
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ENTRY(XMM9) \
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ENTRY(XMM10) \
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ENTRY(XMM11) \
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ENTRY(XMM12) \
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ENTRY(XMM13) \
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ENTRY(XMM14) \
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ENTRY(XMM15) \
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ENTRY(XMM16) \
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ENTRY(XMM17) \
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ENTRY(XMM18) \
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ENTRY(XMM19) \
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ENTRY(XMM20) \
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ENTRY(XMM21) \
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ENTRY(XMM22) \
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ENTRY(XMM23) \
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ENTRY(XMM24) \
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ENTRY(XMM25) \
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ENTRY(XMM26) \
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ENTRY(XMM27) \
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ENTRY(XMM28) \
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ENTRY(XMM29) \
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ENTRY(XMM30) \
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ENTRY(XMM31)
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#define REGS_YMM \
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ENTRY(YMM0) \
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ENTRY(YMM1) \
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ENTRY(YMM2) \
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ENTRY(YMM3) \
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ENTRY(YMM4) \
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ENTRY(YMM5) \
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ENTRY(YMM6) \
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ENTRY(YMM7) \
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ENTRY(YMM8) \
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ENTRY(YMM9) \
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ENTRY(YMM10) \
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ENTRY(YMM11) \
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ENTRY(YMM12) \
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ENTRY(YMM13) \
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ENTRY(YMM14) \
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ENTRY(YMM15) \
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ENTRY(YMM16) \
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ENTRY(YMM17) \
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ENTRY(YMM18) \
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ENTRY(YMM19) \
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ENTRY(YMM20) \
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ENTRY(YMM21) \
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ENTRY(YMM22) \
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ENTRY(YMM23) \
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ENTRY(YMM24) \
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ENTRY(YMM25) \
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ENTRY(YMM26) \
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ENTRY(YMM27) \
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ENTRY(YMM28) \
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ENTRY(YMM29) \
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ENTRY(YMM30) \
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ENTRY(YMM31)
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#define REGS_ZMM \
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ENTRY(ZMM0) \
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ENTRY(ZMM1) \
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ENTRY(ZMM2) \
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ENTRY(ZMM3) \
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ENTRY(ZMM4) \
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ENTRY(ZMM5) \
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ENTRY(ZMM6) \
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ENTRY(ZMM7) \
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ENTRY(ZMM8) \
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ENTRY(ZMM9) \
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ENTRY(ZMM10) \
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ENTRY(ZMM11) \
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ENTRY(ZMM12) \
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ENTRY(ZMM13) \
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ENTRY(ZMM14) \
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ENTRY(ZMM15) \
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ENTRY(ZMM16) \
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ENTRY(ZMM17) \
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ENTRY(ZMM18) \
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ENTRY(ZMM19) \
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ENTRY(ZMM20) \
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ENTRY(ZMM21) \
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ENTRY(ZMM22) \
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ENTRY(ZMM23) \
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ENTRY(ZMM24) \
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ENTRY(ZMM25) \
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ENTRY(ZMM26) \
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ENTRY(ZMM27) \
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ENTRY(ZMM28) \
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ENTRY(ZMM29) \
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ENTRY(ZMM30) \
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ENTRY(ZMM31)
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#define REGS_MASKS \
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ENTRY(K0) \
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ENTRY(K1) \
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ENTRY(K2) \
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ENTRY(K3) \
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ENTRY(K4) \
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ENTRY(K5) \
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ENTRY(K6) \
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ENTRY(K7)
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#define REGS_SEGMENT \
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ENTRY(ES) \
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ENTRY(CS) \
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ENTRY(SS) \
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ENTRY(DS) \
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ENTRY(FS) \
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ENTRY(GS)
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#define REGS_DEBUG \
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ENTRY(DR0) \
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ENTRY(DR1) \
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ENTRY(DR2) \
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ENTRY(DR3) \
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ENTRY(DR4) \
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ENTRY(DR5) \
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ENTRY(DR6) \
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ENTRY(DR7)
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#define REGS_CONTROL \
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ENTRY(CR0) \
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ENTRY(CR1) \
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ENTRY(CR2) \
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ENTRY(CR3) \
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ENTRY(CR4) \
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ENTRY(CR5) \
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ENTRY(CR6) \
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ENTRY(CR7) \
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ENTRY(CR8)
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#define ALL_EA_BASES \
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EA_BASES_16BIT \
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EA_BASES_32BIT \
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EA_BASES_64BIT
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#define ALL_SIB_BASES \
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REGS_32BIT \
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REGS_64BIT
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#define ALL_REGS \
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REGS_8BIT \
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REGS_16BIT \
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REGS_32BIT \
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REGS_64BIT \
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REGS_MMX \
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REGS_XMM \
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REGS_YMM \
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REGS_ZMM \
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REGS_MASKS \
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REGS_SEGMENT \
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REGS_DEBUG \
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REGS_CONTROL \
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ENTRY(RIP)
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/*
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* EABase - All possible values of the base field for effective-address
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* computations, a.k.a. the Mod and R/M fields of the ModR/M byte. We
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* distinguish between bases (EA_BASE_*) and registers that just happen to be
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* referred to when Mod == 0b11 (EA_REG_*).
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*/
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typedef enum {
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EA_BASE_NONE,
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#define ENTRY(x) EA_BASE_##x,
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ALL_EA_BASES
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#undef ENTRY
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#define ENTRY(x) EA_REG_##x,
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ALL_REGS
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#undef ENTRY
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EA_max
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} EABase;
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/*
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* SIBIndex - All possible values of the SIB index field.
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* Borrows entries from ALL_EA_BASES with the special case that
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* sib is synonymous with NONE.
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* Vector SIB: index can be XMM or YMM.
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*/
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typedef enum {
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SIB_INDEX_NONE,
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#define ENTRY(x) SIB_INDEX_##x,
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ALL_EA_BASES
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REGS_XMM
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REGS_YMM
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REGS_ZMM
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#undef ENTRY
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SIB_INDEX_max
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} SIBIndex;
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/*
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* SIBBase - All possible values of the SIB base field.
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*/
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typedef enum {
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SIB_BASE_NONE,
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#define ENTRY(x) SIB_BASE_##x,
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ALL_SIB_BASES
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#undef ENTRY
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SIB_BASE_max
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} SIBBase;
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/*
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* EADisplacement - Possible displacement types for effective-address
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* computations.
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*/
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typedef enum {
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EA_DISP_NONE,
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EA_DISP_8,
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EA_DISP_16,
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EA_DISP_32
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} EADisplacement;
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/*
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* Reg - All possible values of the reg field in the ModR/M byte.
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*/
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typedef enum {
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#define ENTRY(x) MODRM_REG_##x,
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ALL_REGS
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#undef ENTRY
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MODRM_REG_max
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} Reg;
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/*
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* SegmentOverride - All possible segment overrides.
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*/
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typedef enum {
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SEG_OVERRIDE_NONE,
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SEG_OVERRIDE_CS,
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SEG_OVERRIDE_SS,
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SEG_OVERRIDE_DS,
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SEG_OVERRIDE_ES,
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SEG_OVERRIDE_FS,
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SEG_OVERRIDE_GS,
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SEG_OVERRIDE_max
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} SegmentOverride;
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/*
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* VEXLeadingOpcodeByte - Possible values for the VEX.m-mmmm field
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*/
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typedef enum {
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VEX_LOB_0F = 0x1,
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VEX_LOB_0F38 = 0x2,
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VEX_LOB_0F3A = 0x3
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} VEXLeadingOpcodeByte;
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typedef enum {
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XOP_MAP_SELECT_8 = 0x8,
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XOP_MAP_SELECT_9 = 0x9,
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XOP_MAP_SELECT_A = 0xA
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} XOPMapSelect;
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/*
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* VEXPrefixCode - Possible values for the VEX.pp/EVEX.pp field
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*/
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typedef enum {
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VEX_PREFIX_NONE = 0x0,
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VEX_PREFIX_66 = 0x1,
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VEX_PREFIX_F3 = 0x2,
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VEX_PREFIX_F2 = 0x3
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} VEXPrefixCode;
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typedef enum {
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TYPE_NO_VEX_XOP = 0x0,
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TYPE_VEX_2B = 0x1,
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TYPE_VEX_3B = 0x2,
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TYPE_EVEX = 0x3,
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TYPE_XOP = 0x4
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} VectorExtensionType;
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typedef uint8_t BOOL;
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/*
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* byteReader_t - Type for the byte reader that the consumer must provide to
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* the decoder. Reads a single byte from the instruction's address space.
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* @param arg - A baton that the consumer can associate with any internal
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* state that it needs.
|
|
* @param byte - A pointer to a single byte in memory that should be set to
|
|
* contain the value at address.
|
|
* @param address - The address in the instruction's address space that should
|
|
* be read from.
|
|
* @return - -1 if the byte cannot be read for any reason; 0 otherwise.
|
|
*/
|
|
typedef int (*byteReader_t)(const void* arg, uint8_t* byte, uint64_t address);
|
|
|
|
/*
|
|
* dlog_t - Type for the logging function that the consumer can provide to
|
|
* get debugging output from the decoder.
|
|
* @param arg - A baton that the consumer can associate with any internal
|
|
* state that it needs.
|
|
* @param log - A string that contains the message. Will be reused after
|
|
* the logger returns.
|
|
*/
|
|
typedef void (*dlog_t)(void* arg, const char *log);
|
|
|
|
/*
|
|
* The x86 internal instruction, which is produced by the decoder.
|
|
*/
|
|
struct InternalInstruction {
|
|
/* Reader interface (C) */
|
|
byteReader_t reader;
|
|
/* Opaque value passed to the reader */
|
|
const void* readerArg;
|
|
/* The address of the next byte to read via the reader */
|
|
uint64_t readerCursor;
|
|
|
|
/* Logger interface (C) */
|
|
dlog_t dlog;
|
|
/* Opaque value passed to the logger */
|
|
void* dlogArg;
|
|
|
|
/* General instruction information */
|
|
|
|
/* The mode to disassemble for (64-bit, protected, real) */
|
|
DisassemblerMode mode;
|
|
/* The start of the instruction, usable with the reader */
|
|
uint64_t startLocation;
|
|
/* The length of the instruction, in bytes */
|
|
size_t length;
|
|
|
|
/* Prefix state */
|
|
|
|
/* 1 if the prefix byte corresponding to the entry is present; 0 if not */
|
|
uint8_t prefixPresent[0x100];
|
|
/* contains the location (for use with the reader) of the prefix byte */
|
|
uint64_t prefixLocations[0x100];
|
|
/* The value of the vector extension prefix(EVEX/VEX/XOP), if present */
|
|
uint8_t vectorExtensionPrefix[4];
|
|
/* The type of the vector extension prefix */
|
|
VectorExtensionType vectorExtensionType;
|
|
/* The value of the REX prefix, if present */
|
|
uint8_t rexPrefix;
|
|
/* The location where a mandatory prefix would have to be (i.e., right before
|
|
the opcode, or right before the REX prefix if one is present) */
|
|
uint64_t necessaryPrefixLocation;
|
|
/* The segment override type */
|
|
SegmentOverride segmentOverride;
|
|
/* 1 if the prefix byte, 0xf2 or 0xf3 is xacquire or xrelease */
|
|
BOOL xAcquireRelease;
|
|
|
|
/* Sizes of various critical pieces of data, in bytes */
|
|
uint8_t registerSize;
|
|
uint8_t addressSize;
|
|
uint8_t displacementSize;
|
|
uint8_t immediateSize;
|
|
|
|
/* Offsets from the start of the instruction to the pieces of data, which is
|
|
needed to find relocation entries for adding symbolic operands */
|
|
uint8_t displacementOffset;
|
|
uint8_t immediateOffset;
|
|
|
|
/* opcode state */
|
|
|
|
/* The last byte of the opcode, not counting any ModR/M extension */
|
|
uint8_t opcode;
|
|
/* The ModR/M byte of the instruction, if it is an opcode extension */
|
|
uint8_t modRMExtension;
|
|
|
|
/* decode state */
|
|
|
|
/* The type of opcode, used for indexing into the array of decode tables */
|
|
OpcodeType opcodeType;
|
|
/* The instruction ID, extracted from the decode table */
|
|
uint16_t instructionID;
|
|
/* The specifier for the instruction, from the instruction info table */
|
|
const struct InstructionSpecifier *spec;
|
|
|
|
/* state for additional bytes, consumed during operand decode. Pattern:
|
|
consumed___ indicates that the byte was already consumed and does not
|
|
need to be consumed again */
|
|
|
|
/* The VEX.vvvv field, which contains a third register operand for some AVX
|
|
instructions */
|
|
Reg vvvv;
|
|
|
|
/* The writemask for AVX-512 instructions which is contained in EVEX.aaa */
|
|
Reg writemask;
|
|
|
|
/* The ModR/M byte, which contains most register operands and some portion of
|
|
all memory operands */
|
|
BOOL consumedModRM;
|
|
uint8_t modRM;
|
|
|
|
/* The SIB byte, used for more complex 32- or 64-bit memory operands */
|
|
BOOL consumedSIB;
|
|
uint8_t sib;
|
|
|
|
/* The displacement, used for memory operands */
|
|
BOOL consumedDisplacement;
|
|
int32_t displacement;
|
|
|
|
/* Immediates. There can be two in some cases */
|
|
uint8_t numImmediatesConsumed;
|
|
uint8_t numImmediatesTranslated;
|
|
uint64_t immediates[2];
|
|
|
|
/* A register or immediate operand encoded into the opcode */
|
|
Reg opcodeRegister;
|
|
|
|
/* Portions of the ModR/M byte */
|
|
|
|
/* These fields determine the allowable values for the ModR/M fields, which
|
|
depend on operand and address widths */
|
|
EABase eaBaseBase;
|
|
EABase eaRegBase;
|
|
Reg regBase;
|
|
|
|
/* The Mod and R/M fields can encode a base for an effective address, or a
|
|
register. These are separated into two fields here */
|
|
EABase eaBase;
|
|
EADisplacement eaDisplacement;
|
|
/* The reg field always encodes a register */
|
|
Reg reg;
|
|
|
|
/* SIB state */
|
|
SIBIndex sibIndex;
|
|
uint8_t sibScale;
|
|
SIBBase sibBase;
|
|
|
|
const struct OperandSpecifier *operands;
|
|
};
|
|
|
|
/* decodeInstruction - Decode one instruction and store the decoding results in
|
|
* a buffer provided by the consumer.
|
|
* @param insn - The buffer to store the instruction in. Allocated by the
|
|
* consumer.
|
|
* @param reader - The byteReader_t for the bytes to be read.
|
|
* @param readerArg - An argument to pass to the reader for storing context
|
|
* specific to the consumer. May be NULL.
|
|
* @param logger - The dlog_t to be used in printing status messages from the
|
|
* disassembler. May be NULL.
|
|
* @param loggerArg - An argument to pass to the logger for storing context
|
|
* specific to the logger. May be NULL.
|
|
* @param startLoc - The address (in the reader's address space) of the first
|
|
* byte in the instruction.
|
|
* @param mode - The mode (16-bit, 32-bit, 64-bit) to decode in.
|
|
* @return - Nonzero if there was an error during decode, 0 otherwise.
|
|
*/
|
|
int decodeInstruction(struct InternalInstruction* insn,
|
|
byteReader_t reader,
|
|
const void* readerArg,
|
|
dlog_t logger,
|
|
void* loggerArg,
|
|
const void* miiArg,
|
|
uint64_t startLoc,
|
|
DisassemblerMode mode);
|
|
|
|
/* x86DisassemblerDebug - C-accessible function for printing a message to
|
|
* debugs()
|
|
* @param file - The name of the file printing the debug message.
|
|
* @param line - The line number that printed the debug message.
|
|
* @param s - The message to print.
|
|
*/
|
|
|
|
void x86DisassemblerDebug(const char *file,
|
|
unsigned line,
|
|
const char *s);
|
|
|
|
const char *x86DisassemblerGetInstrName(unsigned Opcode, const void *mii);
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif
|