llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-08 06:32:24 +00:00

History

Hal Finkel c48b3bf318 [PowerPC] Fix inline asm memory operands not to use r0

On PowerPC, inline asm memory operands might be expanded as 0($r), where $r is
a register containing the address. As a result, this register cannot be r0, and
we need to enforce this register subclass constraint to prevent miscompiling
the code (we'd get this constraint for free with the usual instruction
definitions, but that scheme has no knowledge of how we end up printing inline
asm memory operands, and so here we need to do it 'by hand'). We can accomplish
this within the current address-mode selection framework by introducing an
explicit COPY_TO_REGCLASS node.

Fixes PR21443.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223318 91177308-0d34-0410-b5e6-96231b3b80d8

2014-12-03 23:40:13 +00:00

Analysis

Simplify pointer comparisons involving memory allocation functions

2014-12-01 23:38:06 +00:00

AsmParser

Prologue support

2014-12-03 02:08:38 +00:00

Bitcode

Ask the module for its the identified types.

2014-12-03 07:18:23 +00:00

CodeGen

[RegAllocFast] Handle implicit definitions conservatively.