Hal Finkel ee5f4bb6b3 [PowerPC] Generate VSX permutations for v2[fi]64 vectors ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204873 91177308-0d34-0410-b5e6-96231b3b80d8

2014-03-26 22:58:37 +00:00

..

AArch64

AArch64_BE Elf support for MC-JIT runtime dynamic linker

2014-03-26 14:57:32 +00:00

ARM

ARM: add intrinsics for the v8 ldaex/stlex

2014-03-26 14:39:31 +00:00

CPP

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Generic

CommandLine: Exit successfully for -version and -help

2014-02-28 19:08:01 +00:00

Hexagon

Fix broken CHECK lines

2014-02-16 07:31:05 +00:00

Inputs

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Mips

Add @llvm.clear_cache builtin

2014-03-26 12:52:28 +00:00

MSP430

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NVPTX

Add test to test/CodeGen/NVPTX for "alloca buffer" arguments.

2014-03-24 16:52:30 +00:00

PowerPC

[PowerPC] Generate VSX permutations for v2[fi]64 vectors

2014-03-26 22:58:37 +00:00

R600

R600: Add a testcase for sext_in_reg I missed.

2014-03-26 18:31:06 +00:00

SPARC

Remove the linker_private and linker_private_weak linkages.

2014-03-13 23:18:37 +00:00

SystemZ

[SystemZ] Add support for z196 float<->unsigned conversions

2014-03-21 10:56:30 +00:00

Thumb

Add triples to try to fix the windows bots.

2014-02-13 16:49:47 +00:00

Thumb2

ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) wouldn't affect CPSR in an IT block

2014-02-26 11:27:28 +00:00

X86

This is a fix for PR# 19051. I noticed code gen differences due to code motion when running tests with and without the debug info at O2. The problem is in branch folding. A loop wanted to skip the debug info, but actually it didn't do so.

2014-03-26 22:15:28 +00:00

XCore

[XCore] Add support for the "m" inline asm constraint.

2014-03-06 16:37:48 +00:00