Juergen Ributzka fcfc234130 [X86] Emulate AVX 256bit MIN/MAX support by splitting the vector. ... In AVX 256bit vectors are valid vectors and therefore the Type Legalizer doesn't split the VSELECT and SETCC nodes. AVX only supports MIN/MAX on 128bit vectors and this fix enables vector splitting for this special case in the X86 DAG Combiner. This fix is related to PR16695, PR17002, and <rdar://problem/14594431>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191131 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-21 04:55:22 +00:00
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AArch64
ARM	Initialize BSSSection explicitly in InitMachOMCObjectFileInfo() to appease msvc.	2013-09-21 02:34:45 +00:00
CPP
Generic
Hexagon
Inputs
Mips	Set .reorder for the stub so that gas takes care of delay slot processing.	2013-09-21 01:37:52 +00:00
MSP430
NVPTX	[NVPTX] Make constant vector test case endian-independent	2013-09-19 13:14:44 +00:00
PowerPC
R600
SPARC
SystemZ	[SystemZ] Add unsigned compare-and-branch instructions	2013-09-18 09:56:40 +00:00
Thumb
Thumb2
X86	[X86] Emulate AVX 256bit MIN/MAX support by splitting the vector.	2013-09-21 04:55:22 +00:00
XCore