mirror of
				https://github.com/c64scene-ar/llvm-6502.git
				synced 2025-11-03 14:21:30 +00:00 
			
		
		
		
	* clean up immediates (we use 14, 22 and 64 bit immediates now. sane.)
  * fold r0/f0/f1 registers into comparisons against 0/0.0/1.0
  * fix nasty thinko - didn't use two-address form of conditional add
    for extending bools to integers, so occasionally there would be
    garbage in the result. it's amazing how often zeros are just
    sitting around in registers ;) - this should fix a bunch of tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21221 91177308-0d34-0410-b5e6-96231b3b80d8
		
	
		
			
				
	
	
		
			420 lines
		
	
	
		
			15 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			420 lines
		
	
	
		
			15 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
//===-- IA64AsmPrinter.cpp - Print out IA64 LLVM as assembly --------------===//
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// 
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//                     The LLVM Compiler Infrastructure
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//
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// This file was developed by Duraid Madina and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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// 
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to assembly accepted by the GNU binutils 'gas'
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// assembler. The Intel 'ias' and HP-UX 'as' assemblers *may* choke on this
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// output, but if so that's a bug I'd like to hear about: please file a bug
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// report in bugzilla. FYI, the excellent 'ias' assembler is bundled with
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// the Intel C/C++ compiler for Itanium Linux.
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//
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//===----------------------------------------------------------------------===//
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#include "IA64.h"
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#include "IA64TargetMachine.h"
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#include "llvm/Module.h"
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#include "llvm/Type.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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namespace {
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  Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed");
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  struct IA64SharedAsmPrinter : public AsmPrinter {
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    std::set<std::string> ExternalFunctionNames, ExternalObjectNames;
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    IA64SharedAsmPrinter(std::ostream &O, TargetMachine &TM)
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      : AsmPrinter(O, TM) { }
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    void printConstantPool(MachineConstantPool *MCP);
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    bool doFinalization(Module &M);
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  };
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}
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static bool isScale(const MachineOperand &MO) {
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  return MO.isImmediate() &&
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    (MO.getImmedValue() == 1 || MO.getImmedValue() == 2 ||
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     MO.getImmedValue() == 4 || MO.getImmedValue() == 8);
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}
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static bool isMem(const MachineInstr *MI, unsigned Op) {
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  if (MI->getOperand(Op).isFrameIndex()) return true;
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  if (MI->getOperand(Op).isConstantPoolIndex()) return true;
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  return Op+4 <= MI->getNumOperands() &&
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    MI->getOperand(Op  ).isRegister() && isScale(MI->getOperand(Op+1)) &&
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    MI->getOperand(Op+2).isRegister() && (MI->getOperand(Op+3).isImmediate() ||
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        MI->getOperand(Op+3).isGlobalAddress());
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}
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// SwitchSection - Switch to the specified section of the executable if we are
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// not already in it!
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//
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static void SwitchSection(std::ostream &OS, std::string &CurSection,
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                          const char *NewSection) {
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  if (CurSection != NewSection) {
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    CurSection = NewSection;
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    if (!CurSection.empty())
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      OS << "\t" << NewSection << "\n";
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  }
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}
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/// printConstantPool - Print to the current output stream assembly
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/// representations of the constants in the constant pool MCP. This is
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/// used to print out constants which have been "spilled to memory" by
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/// the code generator.
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///
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void IA64SharedAsmPrinter::printConstantPool(MachineConstantPool *MCP) {
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  const std::vector<Constant*> &CP = MCP->getConstants();
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  const TargetData &TD = TM.getTargetData();
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  if (CP.empty()) return;
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  O << "\n\t.section .data, \"aw\", \"progbits\"\n";
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      // FIXME: would be nice to have rodata (no 'w') when appropriate?
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  for (unsigned i = 0, e = CP.size(); i != e; ++i) {
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    emitAlignment(TD.getTypeAlignmentShift(CP[i]->getType()));
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    O << ".CPI" << CurrentFnName << "_" << i << ":\t\t\t\t\t" << CommentString
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      << *CP[i] << "\n";
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    emitGlobalConstant(CP[i]);
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  }
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}
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bool IA64SharedAsmPrinter::doFinalization(Module &M) {
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  const TargetData &TD = TM.getTargetData();
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  std::string CurSection;
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  // Print out module-level global variables here.
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  for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
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       I != E; ++I)
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    if (I->hasInitializer()) {   // External global require no code
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      O << "\n\n";
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      std::string name = Mang->getValueName(I);
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      Constant *C = I->getInitializer();
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      unsigned Size = TD.getTypeSize(C->getType());
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      unsigned Align = TD.getTypeAlignmentShift(C->getType());
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      if (C->isNullValue() && 
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          (I->hasLinkOnceLinkage() || I->hasInternalLinkage() ||
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           I->hasWeakLinkage() /* FIXME: Verify correct */)) {
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        SwitchSection(O, CurSection, ".data");
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        if (I->hasInternalLinkage()) {
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	  O << "\t.lcomm " << name << "," << TD.getTypeSize(C->getType())
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	    << "," << (1 << Align);
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	  O << "\t\t// ";
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	} else {
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	  O << "\t.common " << name << "," << TD.getTypeSize(C->getType())
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	    << "," << (1 << Align);
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	  O << "\t\t// ";
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	}
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        WriteAsOperand(O, I, true, true, &M);
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        O << "\n";
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      } else {
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        switch (I->getLinkage()) {
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        case GlobalValue::LinkOnceLinkage:
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        case GlobalValue::WeakLinkage:   // FIXME: Verify correct for weak.
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          // Nonnull linkonce -> weak
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          O << "\t.weak " << name << "\n";
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          SwitchSection(O, CurSection, "");
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          O << "\t.section\t.llvm.linkonce.d." << name
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	    << ", \"aw\", \"progbits\"\n";
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          break;
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        case GlobalValue::AppendingLinkage:
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          // FIXME: appending linkage variables should go into a section of
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          // their name or something.  For now, just emit them as external.
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        case GlobalValue::ExternalLinkage:
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          // If external or appending, declare as a global symbol
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          O << "\t.global " << name << "\n";
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          // FALL THROUGH
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        case GlobalValue::InternalLinkage:
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          if (C->isNullValue())
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            SwitchSection(O, CurSection, ".bss");
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          else
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            SwitchSection(O, CurSection, ".data");
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          break;
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        case GlobalValue::GhostLinkage:
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          std::cerr << "GhostLinkage cannot appear in IA64AsmPrinter!\n";
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          abort();
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        }
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        emitAlignment(Align);
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        O << "\t.type " << name << ",@object\n";
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        O << "\t.size " << name << "," << Size << "\n";
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        O << name << ":\t\t\t\t// ";
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        WriteAsOperand(O, I, true, true, &M);
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        O << " = ";
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        WriteAsOperand(O, C, false, false, &M);
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        O << "\n";
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        emitGlobalConstant(C);
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      }
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    }
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  // we print out ".global X \n .type X, @function" for each external function
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  O << "\n\n// br.call targets referenced (and not defined) above: \n";
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  for (std::set<std::string>::iterator i = ExternalFunctionNames.begin(),
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       e = ExternalFunctionNames.end(); i!=e; ++i) {
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    O << "\t.global " << *i << "\n\t.type " << *i << ", @function\n";
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  }
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  O << "\n\n";
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  // we print out ".global X \n .type X, @object" for each external object
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  O << "\n\n// (external) symbols referenced (and not defined) above: \n";
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  for (std::set<std::string>::iterator i = ExternalObjectNames.begin(),
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       e = ExternalObjectNames.end(); i!=e; ++i) {
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    O << "\t.global " << *i << "\n\t.type " << *i << ", @object\n";
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  }
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  O << "\n\n";
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  AsmPrinter::doFinalization(M);
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  return false; // success
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}
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namespace {
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  struct IA64AsmPrinter : public IA64SharedAsmPrinter {
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    IA64AsmPrinter(std::ostream &O, TargetMachine &TM)
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      : IA64SharedAsmPrinter(O, TM) {
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      CommentString = "//";
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      Data8bitsDirective = "\tdata1\t";     // FIXME: check that we are
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      Data16bitsDirective = "\tdata2.ua\t"; // disabling auto-alignment
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      Data32bitsDirective = "\tdata4.ua\t"; // properly
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      Data64bitsDirective = "\tdata8.ua\t";
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      ZeroDirective = "\t.skip\t";
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      AsciiDirective = "\tstring\t";
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      GlobalVarAddrPrefix="";
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      GlobalVarAddrSuffix="";
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      FunctionAddrPrefix="@fptr(";
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      FunctionAddrSuffix=")";
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    }
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    virtual const char *getPassName() const {
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      return "IA64 Assembly Printer";
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    }
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    /// printInstruction - This method is automatically generated by tablegen
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    /// from the instruction set description.  This method returns true if the
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    /// machine instruction was sufficiently described to print it, otherwise it
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    /// returns false.
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    bool printInstruction(const MachineInstr *MI);
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    // This method is used by the tablegen'erated instruction printer.
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    void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){
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      const MachineOperand &MO = MI->getOperand(OpNo);
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      if (MO.getType() == MachineOperand::MO_MachineRegister) {
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        assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??");
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        //XXX Bug Workaround: See note in Printer::doInitialization about %.
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        O << TM.getRegisterInfo()->get(MO.getReg()).Name;
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      } else {
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        printOp(MO);
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      }
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    }
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    void printS8ImmOperand(const MachineInstr *MI, unsigned OpNo,
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                            MVT::ValueType VT) {
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      int val=(unsigned int)MI->getOperand(OpNo).getImmedValue();
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      if(val>=128) val=val-256; // if negative, flip sign
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      O << val;
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    }
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    void printS14ImmOperand(const MachineInstr *MI, unsigned OpNo,
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                            MVT::ValueType VT) {
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      int val=(unsigned int)MI->getOperand(OpNo).getImmedValue();
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      if(val>=8192) val=val-16384; // if negative, flip sign
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      O << val;
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    }
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    void printS22ImmOperand(const MachineInstr *MI, unsigned OpNo,
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                            MVT::ValueType VT) {
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      int val=(unsigned int)MI->getOperand(OpNo).getImmedValue();
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      if(val>=2097152) val=val-4194304; // if negative, flip sign
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      O << val;
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    }
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    void printU64ImmOperand(const MachineInstr *MI, unsigned OpNo,
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                            MVT::ValueType VT) {
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      O << (uint64_t)MI->getOperand(OpNo).getImmedValue();
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    }
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    void printCallOperand(const MachineInstr *MI, unsigned OpNo,
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                          MVT::ValueType VT) {
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      printOp(MI->getOperand(OpNo), true); // this is a br.call instruction 
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    }
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    void printMachineInstruction(const MachineInstr *MI);
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    void printOp(const MachineOperand &MO, bool isBRCALLinsn= false);
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    bool runOnMachineFunction(MachineFunction &F);    
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    bool doInitialization(Module &M);
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  };
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} // end of anonymous namespace
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// Include the auto-generated portion of the assembly writer.
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#include "IA64GenAsmWriter.inc"
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/// runOnMachineFunction - This uses the printMachineInstruction()
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/// method to print assembly for each instruction.
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///
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bool IA64AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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  setupMachineFunction(MF);
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  O << "\n\n";
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  // Print out constants referenced by the function
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  printConstantPool(MF.getConstantPool());
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  // Print out labels for the function.
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  O << "\n\t.section .text, \"ax\", \"progbits\"\n";
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              // ^^  means "Allocated instruXions in mem, initialized"
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  emitAlignment(5);
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  O << "\t.global\t" << CurrentFnName << "\n";
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  O << "\t.type\t" << CurrentFnName << ", @function\n";
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  O << CurrentFnName << ":\n";
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  // Print out code for the function.
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  for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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       I != E; ++I) {
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    // Print a label for the basic block if there are any predecessors.
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    if (I->pred_begin() != I->pred_end())
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      O << ".LBB" << CurrentFnName << "_" << I->getNumber() << ":\t"
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        << CommentString << " " << I->getBasicBlock()->getName() << "\n";
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    for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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         II != E; ++II) {
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      // Print the assembly for the instruction.
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      O << "\t";
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      printMachineInstruction(II);
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    }
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  }
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  // We didn't modify anything.
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  return false;
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}
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void IA64AsmPrinter::printOp(const MachineOperand &MO,
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                                 bool isBRCALLinsn /* = false */) {
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  const MRegisterInfo &RI = *TM.getRegisterInfo();
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  switch (MO.getType()) {
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  case MachineOperand::MO_VirtualRegister:
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    if (Value *V = MO.getVRegValueOrNull()) {
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      O << "<" << V->getName() << ">";
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      return;
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    }
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    // FALLTHROUGH
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  case MachineOperand::MO_MachineRegister:
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  case MachineOperand::MO_CCRegister: {
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    O << RI.get(MO.getReg()).Name;
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    return;
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  }
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  case MachineOperand::MO_SignExtendedImmed:
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  case MachineOperand::MO_UnextendedImmed:
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    O << /*(unsigned int)*/MO.getImmedValue();
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    return;
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  case MachineOperand::MO_MachineBasicBlock: {
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    MachineBasicBlock *MBBOp = MO.getMachineBasicBlock();
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    O << ".LBB" << Mang->getValueName(MBBOp->getParent()->getFunction())
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      << "_" << MBBOp->getNumber () << "\t// "
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      << MBBOp->getBasicBlock ()->getName ();
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    return;
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  }
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  case MachineOperand::MO_PCRelativeDisp:
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    std::cerr << "Shouldn't use addPCDisp() when building IA64 MachineInstrs";
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    abort ();
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    return;
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  case MachineOperand::MO_ConstantPoolIndex: {
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    O << "@gprel(.CPI" << CurrentFnName << "_"
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      << MO.getConstantPoolIndex() << ")";
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    return;
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  }
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  case MachineOperand::MO_GlobalAddress: {
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    // functions need @ltoff(@fptr(fn_name)) form
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    GlobalValue *GV = MO.getGlobal();
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    Function *F = dyn_cast<Function>(GV);
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    bool Needfptr=false; // if we're computing an address @ltoff(X), do
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                         // we need to decorate it so it becomes
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			 // @ltoff(@fptr(X)) ?
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    if(F && !isBRCALLinsn /*&& F->isExternal()*/)
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      Needfptr=true;
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    // if this is the target of a call instruction, we should define
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    // the function somewhere (GNU gas has no problem without this, but
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    // Intel ias rightly complains of an 'undefined symbol')
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    if(F /*&& isBRCALLinsn*/ && F->isExternal())
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      ExternalFunctionNames.insert(Mang->getValueName(MO.getGlobal()));
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    else
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      if(GV->isExternal()) // e.g. stuff like 'stdin'
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	ExternalObjectNames.insert(Mang->getValueName(MO.getGlobal()));
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    if (!isBRCALLinsn)
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      O << "@ltoff(";
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    if (Needfptr)
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      O << "@fptr(";
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    O << Mang->getValueName(MO.getGlobal());
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    if (Needfptr)
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      O << ")"; // close fptr(
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    if (!isBRCALLinsn)
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      O << ")"; // close ltoff(
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    int Offset = MO.getOffset();
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    if (Offset > 0)
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      O << " + " << Offset;
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    else if (Offset < 0)
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      O << " - " << -Offset;
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    return;
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  }
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  case MachineOperand::MO_ExternalSymbol:
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    O << MO.getSymbolName();
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    ExternalFunctionNames.insert(MO.getSymbolName());
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    return;
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  default:
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    O << "<AsmPrinter: unknown operand type: " << MO.getType() << " >"; return;    
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  }
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}
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/// printMachineInstruction -- Print out a single IA64 LLVM instruction
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/// MI to the current output stream.
 | 
						|
///
 | 
						|
void IA64AsmPrinter::printMachineInstruction(const MachineInstr *MI) {
 | 
						|
  
 | 
						|
  ++EmittedInsts;
 | 
						|
  
 | 
						|
  // Call the autogenerated instruction printer routines.
 | 
						|
  printInstruction(MI);
 | 
						|
}
 | 
						|
 | 
						|
bool IA64AsmPrinter::doInitialization(Module &M) {
 | 
						|
  AsmPrinter::doInitialization(M);
 | 
						|
  
 | 
						|
  O << "\n.ident \"LLVM-ia64\"\n\n"
 | 
						|
    << "\t.psr	  lsb\n"  // should be "msb" on HP-UX, for starters
 | 
						|
    << "\t.radix  C\n"
 | 
						|
    << "\t.psr	  abi64\n"; // we only support 64 bits for now
 | 
						|
  return false;
 | 
						|
}
 | 
						|
 | 
						|
/// createIA64CodePrinterPass - Returns a pass that prints the IA64
 | 
						|
/// assembly code for a MachineFunction to the given output stream, using
 | 
						|
/// the given target machine description.
 | 
						|
///
 | 
						|
FunctionPass *llvm::createIA64CodePrinterPass(std::ostream &o,TargetMachine &tm){
 | 
						|
  return new IA64AsmPrinter(o, tm);
 | 
						|
}
 | 
						|
 | 
						|
 |