Kevin Enderby f49a4092bc Fix the encoding of the armv7m (MClass) for MSR registers other than aspr, ...

iaspr, espr and xpsr which also needed to have 0b10 in their mask encoding bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158560 91177308-0d34-0410-b5e6-96231b3b80d8

2012-06-15 22:14:44 +00:00

..

ARM

Fix the encoding of the armv7m (MClass) for MSR registers other than aspr,

2012-06-15 22:14:44 +00:00

AsmParser

Factor macro argument parsing into helper methods and add support for .irp.

2012-06-15 14:02:34 +00:00

COFF

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Disassembler

Correct decoder for T1 conditional B encoding

2012-06-06 09:12:53 +00:00

ELF

ELF: Add support for the asm .version directive.

2012-05-12 14:30:47 +00:00

MachO

Refactor data-in-code annotations.

2012-05-18 19:12:01 +00:00

MBlaze

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Mips

Make the following changes in MipsAsmPrinter.cpp:

2012-05-12 00:48:43 +00:00

X86

Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions.

2012-05-29 19:05:25 +00:00