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https://github.com/c64scene-ar/llvm-6502.git
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0006bd7520
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4649 91177308-0d34-0410-b5e6-96231b3b80d8
379 lines
13 KiB
C++
379 lines
13 KiB
C++
//===- InstrSelection.cpp - Machine Independant Inst Selection Driver -----===//
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//
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// Machine-independent driver file for instruction selection. This file
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// constructs a forest of BURG instruction trees and then uses the
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// BURG-generated tree grammar (BURM) to find the optimal instruction sequences
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// for a given machine.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/InstrSelection.h"
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#include "llvm/CodeGen/InstrSelectionSupport.h"
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#include "llvm/CodeGen/InstrForest.h"
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#include "llvm/CodeGen/MachineCodeForInstruction.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/Target/MachineRegInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Function.h"
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#include "llvm/iPHINode.h"
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#include "llvm/Pass.h"
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#include "Support/CommandLine.h"
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#include "Support/LeakDetector.h"
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using std::cerr;
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using std::vector;
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namespace {
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//===--------------------------------------------------------------------===//
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// SelectDebugLevel - Allow command line control over debugging.
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//
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enum SelectDebugLevel_t {
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Select_NoDebugInfo,
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Select_PrintMachineCode,
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Select_DebugInstTrees,
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Select_DebugBurgTrees,
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};
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// Enable Debug Options to be specified on the command line
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cl::opt<SelectDebugLevel_t>
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SelectDebugLevel("dselect", cl::Hidden,
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cl::desc("enable instruction selection debug information"),
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cl::values(
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clEnumValN(Select_NoDebugInfo, "n", "disable debug output"),
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clEnumValN(Select_PrintMachineCode, "y", "print generated machine code"),
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clEnumValN(Select_DebugInstTrees, "i",
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"print debugging info for instruction selection"),
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clEnumValN(Select_DebugBurgTrees, "b", "print burg trees"),
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0));
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//===--------------------------------------------------------------------===//
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// InstructionSelection Pass
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//
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// This is the actual pass object that drives the instruction selection
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// process.
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//
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class InstructionSelection : public FunctionPass {
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TargetMachine &Target;
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void InsertCodeForPhis(Function &F);
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void InsertPhiElimInstructions(BasicBlock *BB,
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const vector<MachineInstr*>& CpVec);
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void SelectInstructionsForTree(InstrTreeNode* treeRoot, int goalnt);
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void PostprocessMachineCodeForTree(InstructionNode* instrNode,
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int ruleForNode, short* nts);
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public:
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InstructionSelection(TargetMachine &T) : Target(T) {}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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}
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bool runOnFunction(Function &F);
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};
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}
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// Register the pass...
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static RegisterLLC<InstructionSelection>
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X("instselect", "Instruction Selection", createInstructionSelectionPass);
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TmpInstruction::TmpInstruction(Value *s1, Value *s2, const std::string &name)
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: Instruction(s1->getType(), Instruction::UserOp1, name) {
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Operands.push_back(Use(s1, this)); // s1 must be nonnull
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if (s2) {
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Operands.push_back(Use(s2, this));
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}
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// TmpInstructions should not be garbage checked.
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LeakDetector::removeGarbageObject(this);
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}
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// Constructor that requires the type of the temporary to be specified.
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// Both S1 and S2 may be NULL.(
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TmpInstruction::TmpInstruction(const Type *Ty, Value *s1, Value* s2,
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const std::string &name)
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: Instruction(Ty, Instruction::UserOp1, name) {
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if (s1) { Operands.push_back(Use(s1, this)); }
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if (s2) { Operands.push_back(Use(s2, this)); }
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// TmpInstructions should not be garbage checked.
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LeakDetector::removeGarbageObject(this);
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}
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bool InstructionSelection::runOnFunction(Function &F)
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{
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//
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// Build the instruction trees to be given as inputs to BURG.
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//
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InstrForest instrForest(&F);
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if (SelectDebugLevel >= Select_DebugInstTrees)
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{
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cerr << "\n\n*** Input to instruction selection for function "
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<< F.getName() << "\n\n" << F
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<< "\n\n*** Instruction trees for function "
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<< F.getName() << "\n\n";
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instrForest.dump();
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}
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//
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// Invoke BURG instruction selection for each tree
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//
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for (InstrForest::const_root_iterator RI = instrForest.roots_begin();
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RI != instrForest.roots_end(); ++RI)
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{
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InstructionNode* basicNode = *RI;
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assert(basicNode->parent() == NULL && "A `root' node has a parent?");
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// Invoke BURM to label each tree node with a state
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burm_label(basicNode);
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if (SelectDebugLevel >= Select_DebugBurgTrees)
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{
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printcover(basicNode, 1, 0);
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cerr << "\nCover cost == " << treecost(basicNode, 1, 0) << "\n\n";
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printMatches(basicNode);
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}
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// Then recursively walk the tree to select instructions
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SelectInstructionsForTree(basicNode, /*goalnt*/1);
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}
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//
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// Create the MachineBasicBlock records and add all of the MachineInstrs
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// defined in the MachineCodeForInstruction objects to also live in the
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// MachineBasicBlock objects.
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//
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MachineFunction &MF = MachineFunction::get(&F);
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for (Function::iterator BI = F.begin(), BE = F.end(); BI != BE; ++BI) {
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MachineBasicBlock *MCBB = new MachineBasicBlock(BI);
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MF.getBasicBlockList().push_back(MCBB);
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for (BasicBlock::iterator II = BI->begin(); II != BI->end(); ++II) {
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MachineCodeForInstruction &mvec = MachineCodeForInstruction::get(II);
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MCBB->insert(MCBB->end(), mvec.begin(), mvec.end());
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}
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}
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// Insert phi elimination code
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InsertCodeForPhis(F);
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if (SelectDebugLevel >= Select_PrintMachineCode)
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{
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cerr << "\n*** Machine instructions after INSTRUCTION SELECTION\n";
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MachineFunction::get(&F).dump();
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}
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return true;
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}
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//-------------------------------------------------------------------------
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// This method inserts phi elimination code for all BBs in a method
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//-------------------------------------------------------------------------
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void
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InstructionSelection::InsertCodeForPhis(Function &F)
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{
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// for all basic blocks in function
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//
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MachineFunction &MF = MachineFunction::get(&F);
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for (MachineFunction::iterator BB = MF.begin(); BB != MF.end(); ++BB) {
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for (BasicBlock::iterator IIt = BB->getBasicBlock()->begin();
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PHINode *PN = dyn_cast<PHINode>(&*IIt); ++IIt) {
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// FIXME: This is probably wrong...
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Value *PhiCpRes = new PHINode(PN->getType(), "PhiCp:");
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// The leak detector shouldn't track these nodes. They are not garbage,
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// even though their parent field is never filled in.
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//
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LeakDetector::removeGarbageObject(PhiCpRes);
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// for each incoming value of the phi, insert phi elimination
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//
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for (unsigned i = 0; i < PN->getNumIncomingValues(); ++i) {
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// insert the copy instruction to the predecessor BB
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vector<MachineInstr*> mvec, CpVec;
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Target.getRegInfo().cpValue2Value(PN->getIncomingValue(i), PhiCpRes,
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mvec);
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for (vector<MachineInstr*>::iterator MI=mvec.begin();
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MI != mvec.end(); ++MI) {
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vector<MachineInstr*> CpVec2 =
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FixConstantOperandsForInstr(PN, *MI, Target);
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CpVec2.push_back(*MI);
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CpVec.insert(CpVec.end(), CpVec2.begin(), CpVec2.end());
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}
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InsertPhiElimInstructions(PN->getIncomingBlock(i), CpVec);
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}
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vector<MachineInstr*> mvec;
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Target.getRegInfo().cpValue2Value(PhiCpRes, PN, mvec);
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BB->insert(BB->begin(), mvec.begin(), mvec.end());
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} // for each Phi Instr in BB
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} // for all BBs in function
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}
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//-------------------------------------------------------------------------
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// Thid method inserts a copy instruction to a predecessor BB as a result
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// of phi elimination.
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//-------------------------------------------------------------------------
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void
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InstructionSelection::InsertPhiElimInstructions(BasicBlock *BB,
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const vector<MachineInstr*>& CpVec)
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{
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Instruction *TermInst = (Instruction*)BB->getTerminator();
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MachineCodeForInstruction &MC4Term = MachineCodeForInstruction::get(TermInst);
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MachineInstr *FirstMIOfTerm = MC4Term.front();
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assert (FirstMIOfTerm && "No Machine Instrs for terminator");
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MachineFunction &MF = MachineFunction::get(BB->getParent());
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// FIXME: if PHI instructions existed in the machine code, this would be
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// unnecesary.
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MachineBasicBlock *MBB = 0;
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for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
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if (I->getBasicBlock() == BB) {
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MBB = I;
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break;
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}
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// find the position of first machine instruction generated by the
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// terminator of this BB
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MachineBasicBlock::iterator MCIt =
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std::find(MBB->begin(), MBB->end(), FirstMIOfTerm);
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assert(MCIt != MBB->end() && "Start inst of terminator not found");
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// insert the copy instructions just before the first machine instruction
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// generated for the terminator
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MBB->insert(MCIt, CpVec.begin(), CpVec.end());
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}
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//---------------------------------------------------------------------------
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// Function SelectInstructionsForTree
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//
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// Recursively walk the tree to select instructions.
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// Do this top-down so that child instructions can exploit decisions
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// made at the child instructions.
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//
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// E.g., if br(setle(reg,const)) decides the constant is 0 and uses
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// a branch-on-integer-register instruction, then the setle node
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// can use that information to avoid generating the SUBcc instruction.
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//
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// Note that this cannot be done bottom-up because setle must do this
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// only if it is a child of the branch (otherwise, the result of setle
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// may be used by multiple instructions).
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//---------------------------------------------------------------------------
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void
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InstructionSelection::SelectInstructionsForTree(InstrTreeNode* treeRoot,
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int goalnt)
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{
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// Get the rule that matches this node.
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//
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int ruleForNode = burm_rule(treeRoot->state, goalnt);
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if (ruleForNode == 0) {
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cerr << "Could not match instruction tree for instr selection\n";
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abort();
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}
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// Get this rule's non-terminals and the corresponding child nodes (if any)
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//
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short *nts = burm_nts[ruleForNode];
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// First, select instructions for the current node and rule.
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// (If this is a list node, not an instruction, then skip this step).
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// This function is specific to the target architecture.
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//
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if (treeRoot->opLabel != VRegListOp)
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{
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vector<MachineInstr*> minstrVec;
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InstructionNode* instrNode = (InstructionNode*)treeRoot;
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assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode);
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GetInstructionsByRule(instrNode, ruleForNode, nts, Target, minstrVec);
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MachineCodeForInstruction &mvec =
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MachineCodeForInstruction::get(instrNode->getInstruction());
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mvec.insert(mvec.end(), minstrVec.begin(), minstrVec.end());
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}
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// Then, recursively compile the child nodes, if any.
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//
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if (nts[0])
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{ // i.e., there is at least one kid
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InstrTreeNode* kids[2];
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int currentRule = ruleForNode;
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burm_kids(treeRoot, currentRule, kids);
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// First skip over any chain rules so that we don't visit
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// the current node again.
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//
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while (ThisIsAChainRule(currentRule))
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{
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currentRule = burm_rule(treeRoot->state, nts[0]);
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nts = burm_nts[currentRule];
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burm_kids(treeRoot, currentRule, kids);
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}
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// Now we have the first non-chain rule so we have found
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// the actual child nodes. Recursively compile them.
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//
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for (unsigned i = 0; nts[i]; i++)
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{
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assert(i < 2);
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InstrTreeNode::InstrTreeNodeType nodeType = kids[i]->getNodeType();
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if (nodeType == InstrTreeNode::NTVRegListNode ||
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nodeType == InstrTreeNode::NTInstructionNode)
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SelectInstructionsForTree(kids[i], nts[i]);
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}
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}
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// Finally, do any postprocessing on this node after its children
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// have been translated
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//
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if (treeRoot->opLabel != VRegListOp)
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PostprocessMachineCodeForTree((InstructionNode*)treeRoot, ruleForNode, nts);
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}
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//---------------------------------------------------------------------------
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// Function PostprocessMachineCodeForTree
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//
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// Apply any final cleanups to machine code for the root of a subtree
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// after selection for all its children has been completed.
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//
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void
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InstructionSelection::PostprocessMachineCodeForTree(InstructionNode* instrNode,
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int ruleForNode,
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short* nts)
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{
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// Fix up any constant operands in the machine instructions to either
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// use an immediate field or to load the constant into a register
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// Walk backwards and use direct indexes to allow insertion before current
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//
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Instruction* vmInstr = instrNode->getInstruction();
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MachineCodeForInstruction &mvec = MachineCodeForInstruction::get(vmInstr);
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for (unsigned i = mvec.size(); i != 0; --i)
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{
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vector<MachineInstr*> loadConstVec =
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FixConstantOperandsForInstr(vmInstr, mvec[i-1], Target);
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mvec.insert(mvec.begin()+i-1, loadConstVec.begin(), loadConstVec.end());
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}
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}
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//===----------------------------------------------------------------------===//
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// createInstructionSelectionPass - Public entrypoint for instruction selection
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// and this file as a whole...
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//
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Pass *createInstructionSelectionPass(TargetMachine &T) {
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return new InstructionSelection(T);
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}
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