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			154 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			154 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| //===-- MipsAnalyzeImmediate.cpp - Analyze Immediates ---------------------===//
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| //
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| //                     The LLVM Compiler Infrastructure
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| //
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| // This file is distributed under the University of Illinois Open Source
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| // License. See LICENSE.TXT for details.
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| //
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| //===----------------------------------------------------------------------===//
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| #include "MipsAnalyzeImmediate.h"
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| #include "Mips.h"
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| #include "llvm/Support/MathExtras.h"
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| 
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| using namespace llvm;
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| 
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| MipsAnalyzeImmediate::Inst::Inst(unsigned O, unsigned I) : Opc(O), ImmOpnd(I) {}
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| 
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| // Add I to the instruction sequences.
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| void MipsAnalyzeImmediate::AddInstr(InstSeqLs &SeqLs, const Inst &I) {
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|   // Add an instruction seqeunce consisting of just I.
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|   if (SeqLs.empty()) {
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|     SeqLs.push_back(InstSeq(1, I));
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|     return;
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|   }
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| 
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|   for (InstSeqLs::iterator Iter = SeqLs.begin(); Iter != SeqLs.end(); ++Iter)
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|     Iter->push_back(I);
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| }
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| 
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| void MipsAnalyzeImmediate::GetInstSeqLsADDiu(uint64_t Imm, unsigned RemSize,
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|                                              InstSeqLs &SeqLs) {
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|   GetInstSeqLs((Imm + 0x8000ULL) & 0xffffffffffff0000ULL, RemSize, SeqLs);
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|   AddInstr(SeqLs, Inst(ADDiu, Imm & 0xffffULL));
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| }
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| 
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| void MipsAnalyzeImmediate::GetInstSeqLsORi(uint64_t Imm, unsigned RemSize,
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|                                            InstSeqLs &SeqLs) {
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|   GetInstSeqLs(Imm & 0xffffffffffff0000ULL, RemSize, SeqLs);
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|   AddInstr(SeqLs, Inst(ORi, Imm & 0xffffULL));
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| }
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| 
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| void MipsAnalyzeImmediate::GetInstSeqLsSLL(uint64_t Imm, unsigned RemSize,
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|                                            InstSeqLs &SeqLs) {
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|   unsigned Shamt = countTrailingZeros(Imm);
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|   GetInstSeqLs(Imm >> Shamt, RemSize - Shamt, SeqLs);
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|   AddInstr(SeqLs, Inst(SLL, Shamt));
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| }
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| 
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| void MipsAnalyzeImmediate::GetInstSeqLs(uint64_t Imm, unsigned RemSize,
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|                                         InstSeqLs &SeqLs) {
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|   uint64_t MaskedImm = Imm & (0xffffffffffffffffULL >> (64 - Size));
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| 
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|   // Do nothing if Imm is 0.
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|   if (!MaskedImm)
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|     return;
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| 
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|   // A single ADDiu will do if RemSize <= 16.
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|   if (RemSize <= 16) {
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|     AddInstr(SeqLs, Inst(ADDiu, MaskedImm));
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|     return;
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|   }
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| 
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|   // Shift if the lower 16-bit is cleared.
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|   if (!(Imm & 0xffff)) {
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|     GetInstSeqLsSLL(Imm, RemSize, SeqLs);
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|     return;
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|   }
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| 
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|   GetInstSeqLsADDiu(Imm, RemSize, SeqLs);
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| 
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|   // If bit 15 is cleared, it doesn't make a difference whether the last
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|   // instruction is an ADDiu or ORi. In that case, do not call GetInstSeqLsORi.
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|   if (Imm & 0x8000) {
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|     InstSeqLs SeqLsORi;
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|     GetInstSeqLsORi(Imm, RemSize, SeqLsORi);
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|     SeqLs.insert(SeqLs.end(), SeqLsORi.begin(), SeqLsORi.end());
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|   }
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| }
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| 
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| // Replace a ADDiu & SLL pair with a LUi.
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| // e.g. the following two instructions
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| //  ADDiu 0x0111
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| //  SLL 18
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| // are replaced with
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| //  LUi 0x444
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| void MipsAnalyzeImmediate::ReplaceADDiuSLLWithLUi(InstSeq &Seq) {
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|   // Check if the first two instructions are ADDiu and SLL and the shift amount
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|   // is at least 16.
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|   if ((Seq.size() < 2) || (Seq[0].Opc != ADDiu) ||
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|       (Seq[1].Opc != SLL) || (Seq[1].ImmOpnd < 16))
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|     return;
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| 
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|   // Sign-extend and shift operand of ADDiu and see if it still fits in 16-bit.
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|   int64_t Imm = SignExtend64<16>(Seq[0].ImmOpnd);
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|   int64_t ShiftedImm = (uint64_t)Imm << (Seq[1].ImmOpnd - 16);
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| 
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|   if (!isInt<16>(ShiftedImm))
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|     return;
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| 
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|   // Replace the first instruction and erase the second.
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|   Seq[0].Opc = LUi;
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|   Seq[0].ImmOpnd = (unsigned)(ShiftedImm & 0xffff);
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|   Seq.erase(Seq.begin() + 1);
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| }
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| 
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| void MipsAnalyzeImmediate::GetShortestSeq(InstSeqLs &SeqLs, InstSeq &Insts) {
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|   InstSeqLs::iterator ShortestSeq = SeqLs.end();
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|   // The length of an instruction sequence is at most 7.
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|   unsigned ShortestLength = 8;
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| 
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|   for (InstSeqLs::iterator S = SeqLs.begin(); S != SeqLs.end(); ++S) {
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|     ReplaceADDiuSLLWithLUi(*S);
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|     assert(S->size() <= 7);
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| 
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|     if (S->size() < ShortestLength) {
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|       ShortestSeq = S;
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|       ShortestLength = S->size();
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|     }
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|   }
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| 
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|   Insts.clear();
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|   Insts.append(ShortestSeq->begin(), ShortestSeq->end());
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| }
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| 
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| const MipsAnalyzeImmediate::InstSeq
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| &MipsAnalyzeImmediate::Analyze(uint64_t Imm, unsigned Size,
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|                                bool LastInstrIsADDiu) {
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|   this->Size = Size;
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| 
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|   if (Size == 32) {
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|     ADDiu = Mips::ADDiu;
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|     ORi = Mips::ORi;
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|     SLL = Mips::SLL;
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|     LUi = Mips::LUi;
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|   } else {
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|     ADDiu = Mips::DADDiu;
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|     ORi = Mips::ORi64;
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|     SLL = Mips::DSLL;
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|     LUi = Mips::LUi64;
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|   }
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| 
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|   InstSeqLs SeqLs;
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| 
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|   // Get the list of instruction sequences.
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|   if (LastInstrIsADDiu | !Imm)
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|     GetInstSeqLsADDiu(Imm, Size, SeqLs);
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|   else
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|     GetInstSeqLs(Imm, Size, SeqLs);
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| 
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|   // Set Insts to the shortest instruction sequence.
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|   GetShortestSeq(SeqLs, Insts);
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| 
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|   return Insts;
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| }
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