Vikram S. Adve feb3298fca For instructions in a delay slot of another instruction, ...

we no longer need to find the live-before set of the delayed
branch since that set is now included the live-before/after
set of the instructions in each delay slot.  Just assert that instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7796 91177308-0d34-0410-b5e6-96231b3b80d8

2003-08-12 22:22:24 +00:00

..

InstrSched

Be const correct

2003-07-26 23:23:41 +00:00

InstrSelection

All constant-evaluation code now unified into

2003-07-29 19:50:12 +00:00

Mapping

Moved FInfo.cpp to lib/Target/Sparc as it is Sparc-specific.

2003-06-02 23:27:09 +00:00

ModuloScheduling

Remove #include

2003-07-26 23:01:04 +00:00

PostOpts

…

PreOpts

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RegAlloc

For instructions in a delay slot of another instruction,

2003-08-12 22:22:24 +00:00

SelectionDAG

Initial checkin of SelectionDAG implementation. This is still rough and

2003-08-11 14:57:33 +00:00

LiveVariables.cpp

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MachineCodeEmitter.cpp

Pass through the emitConstantPool() call to the real emitter.

2003-06-03 20:00:49 +00:00

MachineCodeForInstruction.cpp

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MachineFunction.cpp

Const correctness fixes

2003-07-26 23:24:56 +00:00

MachineInstr.cpp

Fix assertion in MachineInstr::substituteValue().

2003-08-07 15:01:48 +00:00

MachineInstrAnnot.cpp

Values stored in CallArgsDescriptor cannot be const.

2003-07-10 19:46:15 +00:00

Makefile

Build the SelectionDAG library

2003-08-11 14:57:48 +00:00

PHIElimination.cpp

Const correctness fixes

2003-07-26 23:24:56 +00:00

PrologEpilogInserter.cpp

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RegAllocLocal.cpp

Fix bugs handling ESP in alloca references

2003-08-05 04:13:58 +00:00

RegAllocSimple.cpp

Set debug types

2003-08-03 21:47:31 +00:00