Nadav Rotem ffe3e7da84 Add X86-SSE4 codegen support for vector-select. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139285 91177308-0d34-0410-b5e6-96231b3b80d8

2011-09-08 08:11:19 +00:00

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Alpha

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ARM

Relax the MemOperands on atomics a bit. Fixes -verify-machineinstrs failures for atomic laod/store on ARM.

2011-09-07 02:23:42 +00:00

Blackfin

more tests not making the jump into the brave new world.

2011-07-09 16:57:10 +00:00

CBackend

Revert r137134. It breaks some code as Eli pointed out.

2011-08-09 18:56:35 +00:00

CellSPU

Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction.

2011-09-02 10:05:01 +00:00

CPP

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Generic

Add X86-SSE4 codegen support for vector-select.

2011-09-08 08:11:19 +00:00

MBlaze

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Mips

Disable these tests harder. They're XFAIL'd, but that means they still run, and

2011-09-06 22:08:18 +00:00

MSP430

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PowerPC

Split the init.trampoline intrinsic, which currently combines GCC's

2011-09-06 13:37:06 +00:00

PTX

PTX: Add initial support for device function calls

2011-08-09 17:36:31 +00:00

SPARC

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SystemZ

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Thumb

Disable these tests harder. They're XFAIL'd, but that means they still run, and

2011-09-06 22:08:18 +00:00

Thumb2

Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical

2011-08-30 01:34:54 +00:00

X86

Fix atomic load and store on x86 to pass -verify-machineinstrs (and possibly fix some subtle bugs involving passes which check mayStore()).

2011-09-07 18:48:32 +00:00

XCore

Split the init.trampoline intrinsic, which currently combines GCC's

2011-09-06 13:37:06 +00:00