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Reference avr-llvm, example of a backend for an 8-bit RISC arch
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@ -13,5 +13,6 @@ Welcome to the llvm-6502 wiki!
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- [Creating an LLVM Backend for the Cpu0 Architecture](http://jonathan2251.github.io/lbd)
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- [Design and Implementation of a TriCore Backend](https://opus4.kobv.de/opus4-fau/files/1108/tricore_llvm.pdf)
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- [avr-llvm: AVR Backend](https://github.com/avr-llvm/llvm)
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- [Thread: [LLVMdev] MOS6502 target](https://groups.google.com/d/msg/llvm-dev/w37MfNU_Ag8/LdiDNHgjpGEJ)
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- [Thread: A GCC backend for the 6502?](http://forum.6502.org/viewtopic.php?t=1476)
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