From f84ced2d4e39a07dc1a981f4e5418a50aba72aba Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Dami=C3=A1n=20Silvani?= Date: Wed, 5 Aug 2015 21:45:25 -0300 Subject: [PATCH] Add 6502 instruction set explanation --- Home.md | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Home.md b/Home.md index 3570967..4d0fc8a 100644 --- a/Home.md +++ b/Home.md @@ -11,8 +11,9 @@ Welcome to the llvm-6502 wiki! ## Links of interest -- [Creating an LLVM Backend for the Cpu0 Architecture](http://jonathan2251.github.io/lbd) - [Design and Implementation of a TriCore Backend](https://opus4.kobv.de/opus4-fau/files/1108/tricore_llvm.pdf) - [avr-llvm: AVR Backend](https://github.com/avr-llvm/llvm) +- [Creating an LLVM Backend for the Cpu0 Architecture](http://jonathan2251.github.io/lbd) +- [The 6502/65C02/65C816 Instruction Set Decoded](http://www.llx.com/~nparker/a2/opcodes.html) - [Thread: [LLVMdev] MOS6502 target](https://groups.google.com/d/msg/llvm-dev/w37MfNU_Ag8/LdiDNHgjpGEJ) - [Thread: A GCC backend for the 6502?](http://forum.6502.org/viewtopic.php?t=1476) \ No newline at end of file