2015-07-18 01:05:36 +00:00
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//===-- WDC65816InstrInfo.h - WDC65816 Instruction Information --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the WDC65816 implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef WDC65816INSTRUCTIONINFO_H
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#define WDC65816INSTRUCTIONINFO_H
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#include "WDC65816RegisterInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#define GET_INSTRINFO_HEADER
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#include "WDC65816GenInstrInfo.inc"
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namespace llvm {
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class WDC65816InstrInfo : public WDC65816GenInstrInfo {
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const WDC65816RegisterInfo RI;
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2015-07-18 04:57:48 +00:00
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const WDC65816Subtarget& Subtarget;
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2015-07-18 01:05:36 +00:00
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virtual void anchor();
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public:
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2015-07-18 04:57:48 +00:00
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explicit WDC65816InstrInfo(WDC65816Subtarget &ST);
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2015-07-18 01:05:36 +00:00
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/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
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/// such, whenever a client has an instance of instruction info, it should
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/// always be able to get register info as well (through this method).
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///
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virtual const WDC65816RegisterInfo &getRegisterInfo() const { return RI; }
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unsigned getGlobalBaseReg(MachineFunction *MF) const;
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2016-02-10 03:30:11 +00:00
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virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned SrcReg, bool isKill,
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int FrameIndex,
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const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI) const;
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virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, int FrameIdx,
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const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI) const;
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2015-07-18 01:05:36 +00:00
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};
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}
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#endif
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