mirror of
https://github.com/jeremysrand/llvm-65816.git
synced 2024-11-12 14:05:00 +00:00
I have no idea why I thought I did't need a subtarget. I do need one so I have added it.
This commit is contained in:
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@ -16,6 +16,7 @@ add_llvm_target(WDC65816CodeGen
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WDC65816FrameLowering.cpp
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WDC65816MachineFunctionInfo.cpp
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WDC65816RegisterInfo.cpp
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WDC65816Subtarget.cpp
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WDC65816TargetMachine.cpp
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WDC65816SelectionDAGInfo.cpp
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)
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@ -99,6 +99,7 @@ void WDC65816AsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
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bool WDC65816AsmPrinter::printGetPCX(const MachineInstr *MI, unsigned opNum,
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raw_ostream &O) {
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// WDC_TODO - print whatever this is here...
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return true;
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}
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#if 0 // WDC_TODO - How much of this do we need?
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@ -15,14 +15,18 @@
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#define WDC65816_FRAMEINFO_H
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#include "WDC65816.h"
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#include "WDC65816Subtarget.h"
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#include "llvm/Target/TargetFrameLowering.h"
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namespace llvm {
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class WDC65816Subtarget;
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class WDC65816FrameLowering : public TargetFrameLowering {
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const WDC65816Subtarget &SubTarget;
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public:
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explicit WDC65816FrameLowering(void)
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: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 1, 0) {}
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explicit WDC65816FrameLowering(const WDC65816Subtarget &ST)
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: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 1, 0),
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SubTarget(ST) {}
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bool hasFP(const MachineFunction &MF) const;
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@ -30,10 +30,11 @@ using namespace llvm;
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///
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namespace {
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class WDC65816DAGToDAGISel : public SelectionDAGISel {
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const WDC65816Subtarget &Subtarget;
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WDC65816TargetMachine &TM;
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public:
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explicit WDC65816DAGToDAGISel(WDC65816TargetMachine &tm)
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: SelectionDAGISel(tm),
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: SelectionDAGISel(tm), Subtarget(tm.getSubtarget<WDC65816Subtarget>()),
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TM(tm) {
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}
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@ -19,6 +19,7 @@
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#include "llvm/Target/TargetLowering.h"
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namespace llvm {
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class WDC65816Subtarget;
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#if 0 // WDC_TODO - Do I need any of this?
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namespace SPISD {
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enum {
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@ -52,6 +53,7 @@ namespace llvm {
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#endif
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class WDC65816TargetLowering : public TargetLowering {
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const WDC65816Subtarget *Subtarget;
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public:
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WDC65816TargetLowering(TargetMachine &TM);
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@ -14,6 +14,7 @@
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#include "WDC65816InstrInfo.h"
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#include "WDC65816.h"
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#include "WDC65816MachineFunctionInfo.h"
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#include "WDC65816Subtarget.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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@ -32,9 +33,9 @@ using namespace llvm;
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// Pin the vtable to this file.
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void WDC65816InstrInfo::anchor() {}
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WDC65816InstrInfo::WDC65816InstrInfo(void)
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WDC65816InstrInfo::WDC65816InstrInfo(WDC65816Subtarget &ST)
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: WDC65816GenInstrInfo(WDC::ADJCALLSTACKDOWN, WDC::ADJCALLSTACKUP),
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RI() {
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RI(ST), Subtarget(ST) {
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}
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@ -24,9 +24,10 @@ namespace llvm {
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class WDC65816InstrInfo : public WDC65816GenInstrInfo {
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const WDC65816RegisterInfo RI;
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const WDC65816Subtarget& Subtarget;
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virtual void anchor();
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public:
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explicit WDC65816InstrInfo(void);
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explicit WDC65816InstrInfo(WDC65816Subtarget &ST);
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/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
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/// such, whenever a client has an instance of instruction info, it should
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@ -13,6 +13,8 @@
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#include "WDC65816RegisterInfo.h"
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#include "WDC65816.h"
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#include "WDC65816MachineFunctionInfo.h"
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#include "WDC65816Subtarget.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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@ -34,8 +36,8 @@ ReserveAppRegisters("sparc-reserve-app-registers", cl::Hidden, cl::init(false),
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cl::desc("Reserve application registers (%g2-%g4)"));
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#endif
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WDC65816RegisterInfo::WDC65816RegisterInfo(void)
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: WDC65816GenRegisterInfo(WDC::P) {
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WDC65816RegisterInfo::WDC65816RegisterInfo(WDC65816Subtarget &st)
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: WDC65816GenRegisterInfo(WDC::P), Subtarget(st) {
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}
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const uint16_t* WDC65816RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
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@ -21,12 +21,14 @@
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namespace llvm {
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class WDC65816Subtarget;
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class TargetInstrInfo;
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class Type;
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struct WDC65816RegisterInfo : public WDC65816GenRegisterInfo {
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WDC65816Subtarget &Subtarget;
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WDC65816RegisterInfo(void);
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WDC65816RegisterInfo(WDC65816Subtarget &st);
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/// Code Generation virtual methods...
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const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
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64
lib/Target/WDC65816/WDC65816Subtarget.cpp
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64
lib/Target/WDC65816/WDC65816Subtarget.cpp
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@ -0,0 +1,64 @@
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//===-- WDC65816Subtarget.cpp - WDC65816 Subtarget Information ------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the WDC65816 specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#include "WDC65816Subtarget.h"
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#include "WDC65816.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/TargetRegistry.h"
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#define GET_SUBTARGETINFO_TARGET_DESC
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#define GET_SUBTARGETINFO_CTOR
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#include "WDC65816GenSubtargetInfo.inc"
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using namespace llvm;
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void WDC65816Subtarget::anchor() { }
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WDC65816Subtarget::WDC65816Subtarget(const std::string &TT, const std::string &CPU,
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const std::string &FS) :
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WDC65816GenSubtargetInfo(TT, CPU, FS) {
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// Determine default and user specified characteristics
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std::string CPUName = CPU;
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// Parse features string.
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ParseSubtargetFeatures(CPUName, FS);
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}
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#if 0 // WDC_TODO - Do I need this?
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int SparcSubtarget::getAdjustedFrameSize(int frameSize) const {
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if (is64Bit()) {
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// All 64-bit stack frames must be 16-byte aligned, and must reserve space
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// for spilling the 16 window registers at %sp+BIAS..%sp+BIAS+128.
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frameSize += 128;
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// Frames with calls must also reserve space for 6 outgoing arguments
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// whether they are used or not. LowerCall_64 takes care of that.
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assert(frameSize % 16 == 0 && "Stack size not 16-byte aligned");
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} else {
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// Emit the correct save instruction based on the number of bytes in
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// the frame. Minimum stack frame size according to V8 ABI is:
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// 16 words for register window spill
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// 1 word for address of returned aggregate-value
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// + 6 words for passing parameters on the stack
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// ----------
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// 23 words * 4 bytes per word = 92 bytes
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frameSize += 92;
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// Round up to next doubleword boundary -- a double-word boundary
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// is required by the ABI.
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frameSize = RoundUpToAlignment(frameSize, 8);
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}
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return frameSize;
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}
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#endif
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60
lib/Target/WDC65816/WDC65816Subtarget.h
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60
lib/Target/WDC65816/WDC65816Subtarget.h
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//===-- WDC65816Subtarget.h - Define Subtarget for the WDC65816 -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the WDC65816 specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#ifndef WDC65816_SUBTARGET_H
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#define WDC65816_SUBTARGET_H
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#include "llvm/Target/TargetSubtargetInfo.h"
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#include <string>
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#define GET_SUBTARGETINFO_HEADER
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#include "WDC65816GenSubtargetInfo.inc"
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namespace llvm {
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class StringRef;
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class WDC65816Subtarget : public WDC65816GenSubtargetInfo {
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virtual void anchor();
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public:
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WDC65816Subtarget(const std::string &TT, const std::string &CPU,
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const std::string &FS);
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/// ParseSubtargetFeatures - Parses features string setting specified
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/// subtarget options. Definition of function is auto generated by tblgen.
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void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
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bool is64Bit() const { return false; }
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std::string getDataLayout() const {
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return std::string("e-p:32:8:8-i16:8:8-f32:8:8-f68:8:8-n16");
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}
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#if 0 // WDC_TODO - do I need any of this?
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/// The 64-bit ABI uses biased stack and frame pointers, so the stack frame
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/// of the current function is the area from [%sp+BIAS] to [%fp+BIAS].
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int64_t getStackPointerBias() const {
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return is64Bit() ? 2047 : 0;
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}
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/// Given a actual stack size as determined by FrameInfo, this function
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/// returns adjusted framesize which includes space for register window
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/// spills and arguments.
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int getAdjustedFrameSize(int stackSize) const;
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#endif
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};
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} // end namespace llvm
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#endif
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@ -31,10 +31,11 @@ WDC65816TargetMachine::WDC65816TargetMachine(const Target &T, StringRef TT,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL)
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: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
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DL("e-p:32:8:8-i16:8:8-f32:8:8-f68:8:8-n16"),
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InstrInfo(),
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Subtarget(TT, CPU, FS),
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DL(Subtarget.getDataLayout()),
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InstrInfo(Subtarget),
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TLInfo(*this), TSInfo(*this),
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FrameLowering() {
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FrameLowering(Subtarget) {
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initAsmInfo();
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}
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@ -67,5 +68,5 @@ bool WDC65816PassConfig::addInstSelector() {
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/// passes immediately before machine code is emitted. This should return
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/// true if -print-machineinstrs should print out the code after the passes.
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bool WDC65816PassConfig::addPreEmitPass(){
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return true;
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return false;
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}
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#include "WDC65816ISelLowering.h"
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#include "WDC65816InstrInfo.h"
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#include "WDC65816SelectionDAGInfo.h"
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#include "WDC65816Subtarget.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/Target/TargetFrameLowering.h"
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#include "llvm/Target/TargetMachine.h"
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@ -25,7 +26,7 @@
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namespace llvm {
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class WDC65816TargetMachine : public LLVMTargetMachine {
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// SparcSubtarget Subtarget; WDC_TODO - Do I need this?
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WDC65816Subtarget Subtarget;
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const DataLayout DL; // Calculates type size & alignment
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WDC65816InstrInfo InstrInfo;
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WDC65816TargetLowering TLInfo;
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@ -41,6 +42,7 @@ namespace llvm {
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virtual const TargetFrameLowering *getFrameLowering() const {
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return &FrameLowering;
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}
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virtual const WDC65816Subtarget *getSubtargetImpl() const{ return &Subtarget; }
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virtual const WDC65816RegisterInfo *getRegisterInfo() const {
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return &InstrInfo.getRegisterInfo();
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}
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