From 4849b050ce0c284b201f5e042e132a100829667e Mon Sep 17 00:00:00 2001 From: Jeremy Rand Date: Mon, 3 Aug 2015 23:42:37 -0400 Subject: [PATCH] Start adding an implementation for LowerFormalArguments(). --- lib/Target/WDC65816/WDC65816ISelLowering.cpp | 129 ++----------------- 1 file changed, 13 insertions(+), 116 deletions(-) diff --git a/lib/Target/WDC65816/WDC65816ISelLowering.cpp b/lib/Target/WDC65816/WDC65816ISelLowering.cpp index e4d1bdfa..974f1ee8 100644 --- a/lib/Target/WDC65816/WDC65816ISelLowering.cpp +++ b/lib/Target/WDC65816/WDC65816ISelLowering.cpp @@ -34,132 +34,29 @@ using namespace llvm; //===----------------------------------------------------------------------===// // Calling Convention Implementation //===----------------------------------------------------------------------===// -#if 0 // WDC_TODO - Disable all of this from Sparc for now... -static bool CC_WDC65816_Assign_SRet(unsigned &ValNo, MVT &ValVT, - MVT &LocVT, CCValAssign::LocInfo &LocInfo, - ISD::ArgFlagsTy &ArgFlags, CCState &State) -{ - assert (ArgFlags.isSRet()); - - // Assign SRet argument. - State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT, - 0, - LocVT, LocInfo)); - return true; -} - -static bool CC_WDC65816_Assign_f64(unsigned &ValNo, MVT &ValVT, - MVT &LocVT, CCValAssign::LocInfo &LocInfo, - ISD::ArgFlagsTy &ArgFlags, CCState &State) -{ - static const uint16_t RegList[] = { - SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 - }; - // Try to get first reg. - if (unsigned Reg = State.AllocateReg(RegList, 6)) { - State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); - } else { - // Assign whole thing in stack. - State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT, - State.AllocateStack(8,4), - LocVT, LocInfo)); - return true; - } - - // Try to get second reg. - if (unsigned Reg = State.AllocateReg(RegList, 6)) - State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); - else - State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT, - State.AllocateStack(4,4), - LocVT, LocInfo)); - return true; -} - -// Allocate a full-sized argument for the 64-bit ABI. -static bool CC_WDC6581664_Full(unsigned &ValNo, MVT &ValVT, - MVT &LocVT, CCValAssign::LocInfo &LocInfo, - ISD::ArgFlagsTy &ArgFlags, CCState &State) { - assert((LocVT == MVT::f32 || LocVT.getSizeInBits() == 64) && - "Can't handle non-64 bits locations"); - - // Stack space is allocated for all arguments starting from [%fp+BIAS+128]. - unsigned Offset = State.AllocateStack(8, 8); - unsigned Reg = 0; - - if (LocVT == MVT::i64 && Offset < 6*8) - // Promote integers to %i0-%i5. - Reg = SP::I0 + Offset/8; - else if (LocVT == MVT::f64 && Offset < 16*8) - // Promote doubles to %d0-%d30. (Which LLVM calls D0-D15). - Reg = SP::D0 + Offset/8; - else if (LocVT == MVT::f32 && Offset < 16*8) - // Promote floats to %f1, %f3, ... - Reg = SP::F1 + Offset/4; - - // Promote to register when possible, otherwise use the stack slot. - if (Reg) { - State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); - return true; - } - - // This argument goes on the stack in an 8-byte slot. - // When passing floats, LocVT is smaller than 8 bytes. Adjust the offset to - // the right-aligned float. The first 4 bytes of the stack slot are undefined. - if (LocVT == MVT::f32) - Offset += 4; - - State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo)); - return true; -} - -// Allocate a half-sized argument for the 64-bit ABI. -// -// This is used when passing { float, int } structs by value in registers. -static bool CC_WDC6581664_Half(unsigned &ValNo, MVT &ValVT, - MVT &LocVT, CCValAssign::LocInfo &LocInfo, - ISD::ArgFlagsTy &ArgFlags, CCState &State) { - assert(LocVT.getSizeInBits() == 32 && "Can't handle non-32 bits locations"); - unsigned Offset = State.AllocateStack(4, 4); - - if (LocVT == MVT::f32 && Offset < 16*8) { - // Promote floats to %f0-%f31. - State.addLoc(CCValAssign::getReg(ValNo, ValVT, SP::F0 + Offset/4, - LocVT, LocInfo)); - return true; - } - - if (LocVT == MVT::i32 && Offset < 6*8) { - // Promote integers to %i0-%i5, using half the register. - unsigned Reg = SP::I0 + Offset/8; - LocVT = MVT::i64; - LocInfo = CCValAssign::AExt; - - // Set the Custom bit if this i32 goes in the high bits of a register. - if (Offset % 8 == 0) - State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, - LocVT, LocInfo)); - else - State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); - return true; - } - - State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo)); - return true; -} -#endif #include "WDC65816GenCallingConv.inc" SDValue WDC65816TargetLowering::LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, - bool IsVarArg, + bool isVarArg, const SmallVectorImpl &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl &InVals) const { - WDC_LOG("WDC_TODO - Not implemented yet!"); + WDC_LOG("WDC_TODO - Not fully implemented yet!"); + + MachineFunction &MF = DAG.getMachineFunction(); + MachineRegisterInfo &RegInfo = MF.getRegInfo(); + WDC65816MachineFunctionInfo *FuncInfo = MF.getInfo(); + + // Assign locations to all of the incoming arguments. + SmallVector ArgLocs; + CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), + getTargetMachine(), ArgLocs, *DAG.getContext()); + CCInfo.AnalyzeFormalArguments(Ins, CC_WDC); + return Chain; }