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71 lines
2.3 KiB
C++
71 lines
2.3 KiB
C++
//===-- SIRegisterInfo.h - SI Register Info Interface ----------*- C++ -*--===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief Interface definition for SIRegisterInfo
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//
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//===----------------------------------------------------------------------===//
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#ifndef SIREGISTERINFO_H_
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#define SIREGISTERINFO_H_
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#include "AMDGPURegisterInfo.h"
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namespace llvm {
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class AMDGPUTargetMachine;
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struct SIRegisterInfo : public AMDGPURegisterInfo {
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AMDGPUTargetMachine &TM;
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SIRegisterInfo(AMDGPUTargetMachine &tm);
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virtual BitVector getReservedRegs(const MachineFunction &MF) const;
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virtual unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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MachineFunction &MF) const;
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/// \param RC is an AMDIL reg class.
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///
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/// \returns the SI register class that is equivalent to \p RC.
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virtual const TargetRegisterClass *
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getISARegClass(const TargetRegisterClass *RC) const;
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/// \brief get the register class of the specified type to use in the
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/// CFGStructurizer
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virtual const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const;
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virtual unsigned getHWRegIndex(unsigned Reg) const;
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/// \brief Return the 'base' register class for this register.
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/// e.g. SGPR0 => SReg_32, VGPR => VReg_32 SGPR0_SGPR1 -> SReg_32, etc.
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const TargetRegisterClass *getPhysRegClass(unsigned Reg) const;
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/// \returns true if this class contains only SGPR registers
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bool isSGPRClass(const TargetRegisterClass *RC) const;
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/// \returns true if this class contains VGPR registers.
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bool hasVGPRs(const TargetRegisterClass *RC) const;
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/// \returns A VGPR reg class with the same width as \p SRC
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const TargetRegisterClass *getEquivalentVGPRClass(
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const TargetRegisterClass *SRC) const;
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/// \returns The register class that is used for a sub-register of \p RC for
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/// the given \p SubIdx. If \p SubIdx equals NoSubRegister, \p RC will
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/// be returned.
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const TargetRegisterClass *getSubRegClass(const TargetRegisterClass *RC,
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unsigned SubIdx) const;
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};
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} // End namespace llvm
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#endif // SIREGISTERINFO_H_
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