From 081e3bc55c0a832563862d062707768f515b1cca Mon Sep 17 00:00:00 2001 From: Karol Stasiak Date: Mon, 18 Dec 2017 10:09:25 +0100 Subject: [PATCH] Flow analyser should correctly analyse INC A and DEC A --- src/main/scala/millfork/assembly/opt/CoarseFlowAnalyzer.scala | 4 ++++ .../scala/millfork/assembly/opt/QuantumFlowAnalyzer.scala | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/src/main/scala/millfork/assembly/opt/CoarseFlowAnalyzer.scala b/src/main/scala/millfork/assembly/opt/CoarseFlowAnalyzer.scala index 7e21009c..511e5295 100644 --- a/src/main/scala/millfork/assembly/opt/CoarseFlowAnalyzer.scala +++ b/src/main/scala/millfork/assembly/opt/CoarseFlowAnalyzer.scala @@ -223,6 +223,10 @@ object CoarseFlowAnalyzer { currentStatus = currentStatus.copy(n = currentStatus.y.n(_ + 1), z = currentStatus.y.z(_ + 1), y = currentStatus.y.map(_ + 1)) case AssemblyLine(DEY, Implied, _, _) => currentStatus = currentStatus.copy(n = currentStatus.y.n(_ - 1), z = currentStatus.y.z(_ - 1), y = currentStatus.y.map(_ - 1)) + case AssemblyLine(INC, Implied, _, _) => + currentStatus = currentStatus.copy(n = currentStatus.a.n(_ + 1), z = currentStatus.a.z(_ + 1), a = currentStatus.a.map(_ + 1)) + case AssemblyLine(DEC, Implied, _, _) => + currentStatus = currentStatus.copy(n = currentStatus.a.n(_ - 1), z = currentStatus.a.z(_ - 1), a = currentStatus.a.map(_ - 1)) case AssemblyLine(TAX, _, _, _) => currentStatus = currentStatus.copy(x = currentStatus.a, n = currentStatus.a.n(), z = currentStatus.a.z()) case AssemblyLine(TXA, _, _, _) => diff --git a/src/main/scala/millfork/assembly/opt/QuantumFlowAnalyzer.scala b/src/main/scala/millfork/assembly/opt/QuantumFlowAnalyzer.scala index 2f0cabb2..a3f01e8d 100644 --- a/src/main/scala/millfork/assembly/opt/QuantumFlowAnalyzer.scala +++ b/src/main/scala/millfork/assembly/opt/QuantumFlowAnalyzer.scala @@ -308,6 +308,10 @@ object QuantumFlowAnalyzer { currentStatus = currentStatus.mapRegisters(r => r.changeY(_ - 1)).changeNZFromY case AssemblyLine(DEY, Implied, _, _) => currentStatus = currentStatus.mapRegisters(r => r.changeY(_ - 1)).changeNZFromY + case AssemblyLine(INC, Implied, _, _) => + currentStatus = currentStatus.mapRegisters(r => r.changeA(_ - 1)).changeNZFromA + case AssemblyLine(DEC, Implied, _, _) => + currentStatus = currentStatus.mapRegisters(r => r.changeA(_ - 1)).changeNZFromA case AssemblyLine(TAX, _, _, _) => currentStatus = currentStatus.mapRegisters(r => r.copy(x = r.a).afterTransfer(RegEquality.AX)).changeNZFromX case AssemblyLine(TXA, _, _, _) =>