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Add immediate addressing mode for short branches and BRK to support some ugly tricks

This commit is contained in:
Karol Stasiak 2020-01-18 00:07:26 +01:00
parent b3fba658dd
commit 09359235c7
4 changed files with 10 additions and 0 deletions

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@ -13,6 +13,9 @@ There are two ways to include raw assembly code in your Millfork programs:
Millfork inline assembly uses the same three-letter opcodes as most other 6502 assemblers.
Indexing syntax is also the same. Only instructions available on the current CPU architecture are available.
The short branching instructions and the `BRK` instruction support the immediate addressing mode,
for more control over code generation.
The `BBRn/BBSn/SMBn/RMBn` instructions cannot parameterize the tested bit. The syntax is as follows:
BBR1 $10,label

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@ -136,6 +136,10 @@ object CoarseFlowAnalyzer {
case AssemblyLine0(op, Implied, _) if FlowAnalyzerForImplied.hasDefinition(op) =>
currentStatus = FlowAnalyzerForImplied.get(op)(currentStatus)
case AssemblyLine0(op, Immediate, _) if OpcodeClasses.ShortBranching(op) =>
// don't even both optimizing functions with weird jumps, it's futile
return cache.put(code, List.fill[CpuStatus](code.length)(initialStatus))
case AssemblyLine0(op, Immediate | WordImmediate, NumericConstant(nn, _)) if FlowAnalyzerForImmediate.hasDefinition(op) =>
currentStatus = FlowAnalyzerForImmediate.get(op)(nn.toInt, currentStatus)

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@ -172,6 +172,8 @@ object ReverseFlowAnalyzer {
case _ => false
}
currentImportance = if (labelIndex < 0) finalImportance else importanceArray(labelIndex) ~ currentImportance
case AssemblyLine0(opcode, Immediate, _) if OpcodeClasses.ShortConditionalBranching(opcode) =>
currentImportance = finalImportance
case AssemblyLine0(opcode, ZeroPageWithRelative, StructureConstant(_, List(_, MemoryAddressConstant(Label(l))))) if OpcodeClasses.SingleBitBranch(opcode) =>
val L = l
val labelIndex = codeArray.indexWhere {

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@ -397,6 +397,7 @@ object MosAssembler {
op(BEQ, Relative, 0xF0)
op(BRK, Implied, 0)
op(BRK, Immediate, 0)
op(CMP, Immediate, 0xC9)
op(CMP, ZeroPage, 0xC5)