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Fix for a bug in the variable-to-register optimization
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@ -53,6 +53,9 @@ object VariableToRegisterOptimization extends AssemblyOptimization {
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AHX, SHY, SHX, LAS, TAS,
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TRB, TSB)
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private val LdxAddrModes = Set(ZeroPage, Absolute, Immediate, AbsoluteY, ZeroPageY)
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private val LdyAddrModes = Set(ZeroPage, Absolute, Immediate, AbsoluteX, ZeroPageX)
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override def name = "Allocating variables to index registers"
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@ -543,12 +546,12 @@ object VariableToRegisterOptimization extends AssemblyOptimization {
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AssemblyLine.implied(TAY) :: inlineVars(xCandidate, yCandidate, aCandidate, xs)
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case (AssemblyLine(LDA, am, param, true), _) :: (AssemblyLine(STA, Absolute | ZeroPage, MemoryAddressConstant(th), true), _) :: xs
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if th.name == vx && doesntUseX(am) =>
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if th.name == vx && LdxAddrModes(am) =>
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// these TXA's may get optimized away by a different optimization
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AssemblyLine(LDX, am, param) :: AssemblyLine.implied(TXA) :: inlineVars(xCandidate, yCandidate, aCandidate, xs)
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case (AssemblyLine(LDA, am, param, true), _) :: (AssemblyLine(STA, Absolute | ZeroPage, MemoryAddressConstant(th), true), _) :: xs
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if th.name == vy && doesntUseY(am) =>
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if th.name == vy && LdyAddrModes(am) =>
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// these TYA's may get optimized away by a different optimization
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AssemblyLine(LDY, am, param) :: AssemblyLine.implied(TYA) :: inlineVars(xCandidate, yCandidate, aCandidate, xs)
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@ -624,16 +627,6 @@ object VariableToRegisterOptimization extends AssemblyOptimization {
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}
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}
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def doesntUseY(am: AddrMode.Value): Boolean = am match {
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case AbsoluteY | ZeroPageY | IndexedY => false
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case _ => true
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}
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def doesntUseX(am: AddrMode.Value): Boolean = am match {
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case AbsoluteX | ZeroPageX | IndexedX | AbsoluteIndexedX => false
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case _ => true
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}
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def doesntUseXOrY(am: AddrMode.Value): Boolean = am match {
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case Immediate | ZeroPage | Absolute | Relative | Indirect | ZeroPageIndirect => true
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case _ => false
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