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Zeropage variable optimizations
This commit is contained in:
Karol Stasiak
parent
50d4823e0a
commit
17920cee26
@ -184,6 +184,7 @@ object AddrMode extends Enumeration {
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case IndexedX | AbsoluteIndexedX => "(" + argument + ", X)"
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case IndexedY => "(" + argument + "), Y"
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case Indirect | ZeroPageIndirect => "(" + argument + ")"
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case ZeroPage => argument // + "\t;zp"
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case _ => argument;
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}
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}
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@ -282,21 +282,15 @@ object MfCompiler {
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case 0 => ???
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case 1 =>
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v match {
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case mv: VariableInMemory => AssemblyLine.absolute(store, mv) :: Nil
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case mv: VariableInMemory => AssemblyLine.variable(ctx, store, mv)
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case sv@StackVariable(_, _, offset) => AssemblyLine.implied(transferToA) :: AssemblyLine.implied(TSX) :: AssemblyLine.absoluteX(STA, offset + ctx.extraStackOffset) :: Nil
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}
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case s if s > 1 =>
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v match {
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case mv: VariableInMemory =>
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if (mv.zeropage) {
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AssemblyLine.zeropage(store, mv) ::
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AssemblyLine.immediate(LDA, 0) ::
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List.tabulate(s - 1)(i => AssemblyLine.zeropage(STA, mv.toAddress + (i + 1)))
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} else {
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AssemblyLine.absolute(store, mv) ::
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AssemblyLine.immediate(LDA, 0) ::
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List.tabulate(s - 1)(i => AssemblyLine.absolute(STA, mv.toAddress + (i + 1)))
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}
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AssemblyLine.variable(ctx, store, mv) ++
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List(AssemblyLine.immediate(LDA, 0)) ++
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List.tabulate(s - 1)(i => AssemblyLine.variable(ctx, STA, mv, i + 1)).flatten
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case sv@StackVariable(_, _, offset) =>
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AssemblyLine.implied(transferToA) ::
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AssemblyLine.implied(TSX) ::
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@ -465,15 +459,14 @@ object MfCompiler {
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env.get[TypedThing](name) match {
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case source: VariableInMemory =>
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target match {
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case RegisterVariable(Register.A, _) => List(AssemblyLine.absolute(LDA, source))
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case RegisterVariable(Register.X, _) => List(AssemblyLine.absolute(LDX, source))
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case RegisterVariable(Register.Y, _) => List(AssemblyLine.absolute(LDY, source))
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case RegisterVariable(Register.A, _) => AssemblyLine.variable(ctx, LDA, source)
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case RegisterVariable(Register.X, _) => AssemblyLine.variable(ctx, LDX, source)
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case RegisterVariable(Register.Y, _) => AssemblyLine.variable(ctx, LDY, source)
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case RegisterVariable(Register.AX, _) =>
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exprType.size match {
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case 1 => if (exprType.isSigned) {
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val label = nextLabel("sx")
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List(
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AssemblyLine.absolute(LDA, source),
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AssemblyLine.variable(ctx, LDA, source) ++ List(
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AssemblyLine.implied(PHA),
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AssemblyLine.immediate(ORA, 0x7F),
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AssemblyLine.relative(BMI, label),
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@ -481,19 +474,15 @@ object MfCompiler {
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AssemblyLine.label(label),
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AssemblyLine.implied(TAX),
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AssemblyLine.implied(PLA))
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} else List(
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AssemblyLine.absolute(LDA, source),
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AssemblyLine.immediate(LDX, 0))
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case 2 => List(
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AssemblyLine.absolute(LDA, source),
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AssemblyLine.absolute(LDX, source, 1))
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} else AssemblyLine.variable(ctx, LDA, source) :+ AssemblyLine.immediate(LDX, 0)
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case 2 =>
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AssemblyLine.variable(ctx, LDA, source) ++ AssemblyLine.variable(ctx, LDX, source, 1)
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}
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case RegisterVariable(Register.AY, _) =>
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exprType.size match {
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case 1 => if (exprType.isSigned) {
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val label = nextLabel("sx")
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List(
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AssemblyLine.absolute(LDA, source),
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AssemblyLine.variable(ctx, LDA, source) ++ List(
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AssemblyLine.implied(PHA),
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AssemblyLine.immediate(ORA, 0x7F),
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AssemblyLine.relative(BMI, label),
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@ -502,56 +491,47 @@ object MfCompiler {
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AssemblyLine.implied(TAY),
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AssemblyLine.implied(PLA))
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} else {
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List(
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AssemblyLine.absolute(LDA, source),
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AssemblyLine.immediate(LDY, 0))
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AssemblyLine.variable(ctx, LDA, source) :+ AssemblyLine.immediate(LDY, 0)
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}
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case 2 => List(
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AssemblyLine.absolute(LDA, source),
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AssemblyLine.absolute(LDY, source, 1))
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case 2 =>
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AssemblyLine.variable(ctx, LDA, source) ++ AssemblyLine.variable(ctx, LDY, source, 1)
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}
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case RegisterVariable(Register.XA, _) =>
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exprType.size match {
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case 1 => if (exprType.isSigned) {
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val label = nextLabel("sx")
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List(
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AssemblyLine.absolute(LDX, source),
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AssemblyLine.variable(ctx, LDX, source) ++ List(
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AssemblyLine.implied(TXA),
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AssemblyLine.immediate(ORA, 0x7F),
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AssemblyLine.relative(BMI, label),
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AssemblyLine.immediate(LDA, 0),
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AssemblyLine.label(label))
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} else List(
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AssemblyLine.absolute(LDX, source),
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AssemblyLine.immediate(LDA, 0))
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case 2 => List(
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AssemblyLine.absolute(LDX, source),
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AssemblyLine.absolute(LDA, source, 1))
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} else
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AssemblyLine.variable(ctx, LDX, source) :+ AssemblyLine.immediate(LDA, 0)
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case 2 =>
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AssemblyLine.variable(ctx, LDX, source) ++ AssemblyLine.variable(ctx,LDA, source, 1)
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}
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case RegisterVariable(Register.YA, _) =>
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exprType.size match {
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case 1 => if (exprType.isSigned) {
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val label = nextLabel("sx")
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List(
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AssemblyLine.absolute(LDY, source),
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AssemblyLine.variable(ctx, LDY, source) ++ List(
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AssemblyLine.implied(TYA),
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AssemblyLine.immediate(ORA, 0x7F),
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AssemblyLine.relative(BMI, label),
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AssemblyLine.immediate(LDA, 0),
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AssemblyLine.label(label))
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} else List(
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AssemblyLine.absolute(LDY, source),
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AssemblyLine.immediate(LDA, 0))
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case 2 => List(
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AssemblyLine.absolute(LDY, source),
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AssemblyLine.absolute(LDA, source, 1))
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} else
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AssemblyLine.variable(ctx, LDY, source) :+ AssemblyLine.immediate(LDA, 0)
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case 2 =>
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AssemblyLine.variable(ctx, LDY, source) ++ AssemblyLine.variable(ctx, LDA, source, 1)
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}
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case target: VariableInMemory =>
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if (exprType.size > target.typ.size) {
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ErrorReporting.error(s"Variable `$target.name` is too small", expr.position)
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Nil
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} else {
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val copy = List.tabulate(exprType.size)(i => List(AssemblyLine.absolute(LDA, source, i), AssemblyLine.absolute(STA, target, i)))
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val copy = List.tabulate(exprType.size)(i => AssemblyLine.variable(ctx, LDA, source, i) ++ AssemblyLine.variable(ctx, STA, target, i))
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val extend = if (exprType.size == target.typ.size) Nil else if (exprType.isSigned) {
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val label = nextLabel("sx")
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List(
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@ -559,10 +539,10 @@ object MfCompiler {
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AssemblyLine.relative(BMI, label),
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AssemblyLine.immediate(LDA, 0),
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AssemblyLine.label(label)) ++
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List.tabulate(target.typ.size - exprType.size)(i => AssemblyLine.absolute(STA, target, i + exprType.size))
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List.tabulate(target.typ.size - exprType.size)(i => AssemblyLine.variable(ctx, STA, target, i + exprType.size)).flatten
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} else {
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AssemblyLine.immediate(LDA, 0) ::
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List.tabulate(target.typ.size - exprType.size)(i => AssemblyLine.absolute(STA, target, i + exprType.size))
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List.tabulate(target.typ.size - exprType.size)(i => AssemblyLine.variable(ctx, STA, target, i + exprType.size)).flatten
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}
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copy.flatten ++ extend
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}
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@ -571,7 +551,7 @@ object MfCompiler {
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ErrorReporting.error(s"Variable `$target.name` is too small", expr.position)
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Nil
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} else {
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val copy = List.tabulate(exprType.size)(i => List(AssemblyLine.absolute(LDA, source, i), AssemblyLine.absoluteX(STA, target.baseOffset + ctx.extraStackOffset + i)))
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val copy = List.tabulate(exprType.size)(i => AssemblyLine.variable(ctx, LDA, source, i) :+ AssemblyLine.absoluteX(STA, target.baseOffset + ctx.extraStackOffset + i))
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val extend = if (exprType.size == target.typ.size) Nil else if (exprType.isSigned) {
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val label = nextLabel("sx")
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List(
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@ -657,7 +637,7 @@ object MfCompiler {
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ErrorReporting.error(s"Variable `$target.name` is too small", expr.position)
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Nil
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} else {
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val copy = List.tabulate(exprType.size)(i => List(AssemblyLine.absoluteX(LDA, offset + ctx.extraStackOffset + i), AssemblyLine.absolute(STA, target, i)))
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val copy = List.tabulate(exprType.size)(i => AssemblyLine.absoluteX(LDA, offset + ctx.extraStackOffset + i) :: AssemblyLine.variable(ctx, STA, target, i))
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val extend = if (exprType.size == target.typ.size) Nil else if (exprType.isSigned) {
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val label = nextLabel("sx")
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List(
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@ -665,10 +645,10 @@ object MfCompiler {
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AssemblyLine.relative(BMI, label),
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AssemblyLine.immediate(LDA, 0),
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AssemblyLine.label(label)) ++
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List.tabulate(target.typ.size - exprType.size)(i => AssemblyLine.absolute(STA, target, i + exprType.size))
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List.tabulate(target.typ.size - exprType.size)(i => AssemblyLine.variable(ctx, STA, target, i + exprType.size)).flatten
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} else {
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AssemblyLine.immediate(LDA, 0) ::
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List.tabulate(target.typ.size - exprType.size)(i => AssemblyLine.absolute(STA, target, i + exprType.size))
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List.tabulate(target.typ.size - exprType.size)(i => AssemblyLine.variable(ctx, STA, target, i + exprType.size)).flatten
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}
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AssemblyLine.implied(TSX) :: (copy.flatten ++ extend)
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}
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@ -1249,21 +1229,18 @@ object MfCompiler {
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case (t, v: VariableInMemory) => t.size match {
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case 1 => v.typ.size match {
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case 1 =>
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List(AssemblyLine.absolute(STA, v))
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AssemblyLine.variable(ctx, STA, v)
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case s if s > 1 =>
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if (t.isSigned) {
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val label = nextLabel("sx")
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List(
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AssemblyLine.absolute(STA, v),
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AssemblyLine.variable(ctx, STA, v)++List(
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AssemblyLine.immediate(ORA, 0x7f),
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AssemblyLine.relative(BMI, label),
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AssemblyLine.immediate(LDA, 0),
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AssemblyLine.label(label)) ++ List.tabulate(s - 1)(i => AssemblyLine.absolute(STA, v, i + 1))
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AssemblyLine.label(label)) ++ List.tabulate(s - 1)(i => AssemblyLine.variable(ctx, STA, v, i + 1)).flatten
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} else {
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List(
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AssemblyLine.absolute(STA, v),
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AssemblyLine.immediate(LDA, 0)) ++
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List.tabulate(s - 1)(i => AssemblyLine.absolute(STA, v, i + 1))
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AssemblyLine.variable(ctx, STA, v) ++ List(AssemblyLine.immediate(LDA, 0)) ++
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List.tabulate(s - 1)(i => AssemblyLine.variable(ctx, STA, v, i + 1)).flatten
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}
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}
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case 2 => v.typ.size match {
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@ -1271,24 +1248,20 @@ object MfCompiler {
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ErrorReporting.error(s"Variable `${v.name}` cannot hold a word", position)
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Nil
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case 2 =>
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List(AssemblyLine.absolute(STA, v), AssemblyLine.absolute(STX, v, 1))
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AssemblyLine.variable(ctx, STA, v) ++ AssemblyLine.variable(ctx, STX, v, 1)
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case s if s > 2 =>
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if (t.isSigned) {
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val label = nextLabel("sx")
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List(
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AssemblyLine.absolute(STA, v),
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AssemblyLine.absolute(STX, v, 1),
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AssemblyLine.variable(ctx, STA, v) ++ AssemblyLine.variable(ctx, STX, v, 1) ++ List(
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AssemblyLine.implied(TXA),
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AssemblyLine.immediate(ORA, 0x7f),
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AssemblyLine.relative(BMI, label),
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AssemblyLine.immediate(LDA, 0),
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AssemblyLine.label(label)) ++ List.tabulate(s - 2)(i => AssemblyLine.absolute(STA, v, i + 2))
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AssemblyLine.label(label)) ++ List.tabulate(s - 2)(i => AssemblyLine.variable(ctx, STA, v, i + 2)).flatten
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} else {
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List(
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AssemblyLine.absolute(STA, v),
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AssemblyLine.absolute(STX, v, 1),
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AssemblyLine.variable(ctx, STA, v) ++ AssemblyLine.variable(ctx, STX, v, 1) ++ List(
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AssemblyLine.immediate(LDA, 0)) ++
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List.tabulate(s - 2)(i => AssemblyLine.absolute(STA, v, i + 2))
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List.tabulate(s - 2)(i => AssemblyLine.variable(ctx, STA, v, i + 2)).flatten
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}
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}
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}
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