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65816: Various fixes regarding (d,S),Y addressing mode
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7635fc256f
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194f79f907
@ -494,12 +494,18 @@ object AssemblyLine {
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def absoluteX(opcode: Opcode.Value, thing: ThingInMemory, offset: Int = 0) =
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def absoluteX(opcode: Opcode.Value, thing: ThingInMemory, offset: Int = 0) =
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AssemblyLine(opcode, AddrMode.AbsoluteX, thing.toAddress + offset)
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AssemblyLine(opcode, AddrMode.AbsoluteX, thing.toAddress + offset)
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def indexedY(opcode: Opcode.Value, addr: Int) =
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AssemblyLine(opcode, AddrMode.IndexedY, NumericConstant(addr & 0xff, 1))
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def indexedY(opcode: Opcode.Value, addr: Constant) =
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def indexedY(opcode: Opcode.Value, addr: Constant) =
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AssemblyLine(opcode, AddrMode.IndexedY, addr)
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AssemblyLine(opcode, AddrMode.IndexedY, addr)
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def indexedY(opcode: Opcode.Value, thing: ThingInMemory, offset: Int = 0) =
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def indexedY(opcode: Opcode.Value, thing: ThingInMemory, offset: Int = 0) =
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AssemblyLine(opcode, AddrMode.IndexedY, thing.toAddress + offset)
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AssemblyLine(opcode, AddrMode.IndexedY, thing.toAddress + offset)
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def indexedSY(opcode: Opcode.Value, offset: Int = 0) =
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AssemblyLine(opcode, AddrMode.IndexedSY, NumericConstant(offset & 0xff, 1))
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def stackRelative(opcode: Opcode.Value, addr: Int) =
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def stackRelative(opcode: Opcode.Value, addr: Int) =
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AssemblyLine(opcode, AddrMode.Stack, NumericConstant(addr & 0xff, 1))
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AssemblyLine(opcode, AddrMode.Stack, NumericConstant(addr & 0xff, 1))
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}
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}
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@ -38,14 +38,14 @@ class ChangeIndexRegisterOptimization(preferX2Y: Boolean) extends AssemblyOptimi
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OpcodeClasses.ReadsYAlways(l.opcode) ||
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OpcodeClasses.ReadsYAlways(l.opcode) ||
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OpcodeClasses.ChangesX(l.opcode) ||
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OpcodeClasses.ChangesX(l.opcode) ||
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OpcodeClasses.ChangesY(l.opcode) ||
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OpcodeClasses.ChangesY(l.opcode) ||
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Set(AbsoluteX, AbsoluteY, ZeroPageY, ZeroPageX, IndexedX, IndexedY)(l.addrMode)
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Set(AbsoluteX, AbsoluteY, ZeroPageY, ZeroPageX, IndexedX, IndexedY, LongIndexedY, IndexedSY)(l.addrMode)
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)
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)
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val usesY = code.exists(l =>
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val usesY = code.exists(l =>
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OpcodeClasses.ReadsXAlways(l.opcode) ||
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OpcodeClasses.ReadsXAlways(l.opcode) ||
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OpcodeClasses.ReadsYAlways(l.opcode) ||
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OpcodeClasses.ReadsYAlways(l.opcode) ||
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OpcodeClasses.ChangesX(l.opcode) ||
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OpcodeClasses.ChangesX(l.opcode) ||
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OpcodeClasses.ChangesY(l.opcode) ||
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OpcodeClasses.ChangesY(l.opcode) ||
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Set(AbsoluteX, AbsoluteY, ZeroPageY, ZeroPageX, IndexedX, IndexedY)(l.addrMode)
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Set(AbsoluteX, AbsoluteY, ZeroPageY, ZeroPageX, IndexedX, IndexedY, LongIndexedY, IndexedSY)(l.addrMode)
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)
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)
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if (!usesX && !usesY) {
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if (!usesX && !usesY) {
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return code
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return code
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@ -109,6 +109,7 @@ class ChangeIndexRegisterOptimization(preferX2Y: Boolean) extends AssemblyOptimi
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case AssemblyLine0(_, ZeroPageY, _) :: xs if loaded != Some(Y) => false
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case AssemblyLine0(_, ZeroPageY, _) :: xs if loaded != Some(Y) => false
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case AssemblyLine0(_, IndexedY, _) :: xs if dir == Y2X || loaded != Some(Y) => false
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case AssemblyLine0(_, IndexedY, _) :: xs if dir == Y2X || loaded != Some(Y) => false
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case AssemblyLine0(_, LongIndexedY, _) :: xs if dir == Y2X || loaded != Some(Y) => false
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case AssemblyLine0(_, LongIndexedY, _) :: xs if dir == Y2X || loaded != Some(Y) => false
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case AssemblyLine0(_, IndexedSY, _) :: xs if dir == Y2X || loaded != Some(Y) => false
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case AssemblyLine0(_, AbsoluteX, _) :: xs if loaded != Some(X) => false
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case AssemblyLine0(_, AbsoluteX, _) :: xs if loaded != Some(X) => false
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case AssemblyLine0(_, LongAbsoluteX, _) :: xs if loaded != Some(X) => false
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case AssemblyLine0(_, LongAbsoluteX, _) :: xs if loaded != Some(X) => false
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case AssemblyLine0(_, ZeroPageX, _) :: xs if loaded != Some(X) => false
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case AssemblyLine0(_, ZeroPageX, _) :: xs if loaded != Some(X) => false
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@ -225,6 +226,8 @@ class ChangeIndexRegisterOptimization(preferX2Y: Boolean) extends AssemblyOptimi
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case (x@AssemblyLine0(_, AbsoluteY, _)) :: xs => x.copy(addrMode = AbsoluteX) :: switchY2X(xs)
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case (x@AssemblyLine0(_, AbsoluteY, _)) :: xs => x.copy(addrMode = AbsoluteX) :: switchY2X(xs)
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case (x@AssemblyLine0(_, ZeroPageY, _)) :: xs => x.copy(addrMode = ZeroPageX) :: switchY2X(xs)
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case (x@AssemblyLine0(_, ZeroPageY, _)) :: xs => x.copy(addrMode = ZeroPageX) :: switchY2X(xs)
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case AssemblyLine0(_, IndexedY, _) :: xs => log.fatal("Unexpected IndexedY")
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case AssemblyLine0(_, IndexedY, _) :: xs => log.fatal("Unexpected IndexedY")
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case AssemblyLine0(_, LongIndexedY, _) :: xs => log.fatal("Unexpected LongIndexedY")
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case AssemblyLine0(_, IndexedSY, _) :: xs => log.fatal("Unexpected IndexedSY")
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case x::xs => x :: switchY2X(xs)
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case x::xs => x :: switchY2X(xs)
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case Nil => Nil
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case Nil => Nil
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@ -50,7 +50,7 @@ class MosAssembler(program: Program,
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writeByte(bank, index, MosAssembler.opcodeFor(op, Relative, options))
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writeByte(bank, index, MosAssembler.opcodeFor(op, Relative, options))
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writeByte(bank, index + 1, AssertByte(param - (index + 2)))
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writeByte(bank, index + 1, AssertByte(param - (index + 2)))
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index + 2
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index + 2
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case AssemblyLine0(op, am@(Immediate | ZeroPage | ZeroPageX | ZeroPageY | IndexedY | IndexedX | IndexedZ | LongIndexedY | LongIndexedZ | Stack), param) =>
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case AssemblyLine0(op, am@(Immediate | ZeroPage | ZeroPageX | ZeroPageY | IndexedY | IndexedX | IndexedZ | IndexedSY | LongIndexedY | LongIndexedZ | Stack), param) =>
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writeByte(bank, index, MosAssembler.opcodeFor(op, am, options))
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writeByte(bank, index, MosAssembler.opcodeFor(op, am, options))
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writeByte(bank, index + 1, param)
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writeByte(bank, index + 1, param)
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index + 2
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index + 2
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@ -2898,6 +2898,7 @@ var STA_stack_relative_indirect_indexed_y= {
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execute:function(cpu, bytes) {
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execute:function(cpu, bytes) {
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cpu.cycle_count+=7;
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cpu.cycle_count+=7;
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// TODO: fixes below are not well-tested!
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if(cpu.p.e) {
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if(cpu.p.e) {
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var location_loc = 0x100 | ((cpu.r.s + bytes[0]) & 0xff),
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var location_loc = 0x100 | ((cpu.r.s + bytes[0]) & 0xff),
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low_byte = cpu.mmu.read_byte(location_loc),
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low_byte = cpu.mmu.read_byte(location_loc),
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@ -2907,41 +2908,16 @@ var STA_stack_relative_indirect_indexed_y= {
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} else {
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} else {
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high_byte = cpu.mmu.read_byte(location_loc+1);
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high_byte = cpu.mmu.read_byte(location_loc+1);
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}
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}
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var absolute_location = ((high_byte<<8)|low_byte)+cpu.r.y,
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var absolute_location = ((high_byte<<8)|low_byte)+cpu.r.y;
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b;
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cpu.mmu.store_byte(absolute_location, cpu.r.a);
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if(absolute_location>=0x10000) {
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b = cpu.mmu.read_byte_long(absolute_location, cpu.r.dbr+1);
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} else {
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b = cpu.mmu.read_byte(absolute_location);
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}
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cpu.mmu.store_byte(b, cpu.r.a);
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} else {
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} else {
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var location_loc = cpu.r.s + bytes[0],
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var location_loc = cpu.r.s + bytes[0],
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absolute_location = cpu.mmu.read_word(location_loc)+cpu.r.y;
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absolute_location = cpu.mmu.read_word(location_loc)+cpu.r.y;
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if(cpu.p.m) {
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if(cpu.p.m) {
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var b;
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cpu.mmu.store_byte(absolute_location, cpu.r.a);
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if(absolute_location>=0x10000) {
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b = cpu.mmu.read_byte_long(absolute_location, cpu.r.dbr+1);
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} else {
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b = cpu.mmu.read_byte(absolute_location);
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}
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cpu.mmu.store_byte(b, cpu.r.a);
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} else {
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} else {
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cpu.cycle_count++;
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cpu.cycle_count++;
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cpu.mmu.store_word(absolute_location, cpu.r.a);
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var low_byte, high_byte;
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if(absolute_location>=0x10000) {
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low_byte = cpu.mmu.read_byte_long(absolute_location, cpu.r.dbr+1);
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high_byte = cpu.mmu.read_byte_long(absolute_location+1, cpu.r.dbr+1);
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} else {
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low_byte = cpu.mmu.read_byte(absolute_location);
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if(absolute_location===0xffff) {
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high_byte = cpu.mmu.read_byte_long(0, cpu.r.dbr+1);
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} else {
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high_byte = cpu.mmu.read_byte(absolute_location);
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}
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}
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cpu.mmu.store_word((high_byte<<8)|low_byte, cpu.r.a);
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}
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}
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}
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}
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}
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}
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