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Better stack- and interrupt handling for 65816 and 65CE02

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This commit is contained in:
Karol Stasiak 2018-03-03 14:32:11 +01:00
parent 35f06d5486
commit 33ee5115e0
3 changed files with 68 additions and 11 deletions
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16
src/main/scala/millfork/compiler/BuiltIns.scala
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@ -71,11 +71,17 @@ object BuiltIns {
return simpleOperation(opcode, ctx, param, indexChoice, preserveA, commutative, decimal)
case _: FunctionCallExpression | _:SumExpression if commutative =>
// TODO: is it ok?
return List(AssemblyLine.implied(PHA)) ++ ExpressionCompiler.compile(ctx.addStack(1), source, Some(b -> RegisterVariable(Register.A, b)), NoBranching) ++ wrapInSedCldIfNeeded(decimal, List(
AssemblyLine.implied(TSX),
AssemblyLine.absoluteX(opcode, 0x101),
AssemblyLine.implied(INX),
AssemblyLine.implied(TXS)))
if (ctx.options.flag(CompilationFlag.EmitEmulation65816Opcodes)) {
return List(AssemblyLine.implied(PHA)) ++ ExpressionCompiler.compile(ctx.addStack(1), source, Some(b -> RegisterVariable(Register.A, b)), NoBranching) ++ wrapInSedCldIfNeeded(decimal, List(
AssemblyLine.stackRelative(opcode, 1),
AssemblyLine.implied(PHX)))
} else {
return List(AssemblyLine.implied(PHA)) ++ ExpressionCompiler.compile(ctx.addStack(1), source, Some(b -> RegisterVariable(Register.A, b)), NoBranching) ++ wrapInSedCldIfNeeded(decimal, List(
AssemblyLine.implied(TSX),
AssemblyLine.absoluteX(opcode, 0x101),
AssemblyLine.implied(INX),
AssemblyLine.implied(TXS))) // this TXS is fine, it won't appear in 65816 code
}
case _ =>
ErrorReporting.error("Right-hand-side expression is too complex", source.position)
return Nil

28
src/main/scala/millfork/compiler/MfCompiler.scala
View File

@ -27,7 +27,31 @@ object MfCompiler {
ctx.env.nameCheck(ctx.function.code)
val chunk = StatementCompiler.compile(ctx, ctx.function.code)
val prefix = (if (ctx.function.interrupt) {
if (ctx.options.flag(CompilationFlag.EmitCmosOpcodes)) {
if (ctx.options.flag(CompilationFlag.EmitNative65816Opcodes)) {
List(
AssemblyLine.implied(PHB),
AssemblyLine.implied(PHD),
AssemblyLine.immediate(REP, 0x30),
AssemblyLine.implied(PHA),
AssemblyLine.implied(PHX),
AssemblyLine.implied(PHY),
AssemblyLine.immediate(SEP, 0x30))
} else if (ctx.options.flag(CompilationFlag.EmitEmulation65816Opcodes)) {
List(
AssemblyLine.implied(PHB),
AssemblyLine.implied(PHD),
AssemblyLine.implied(PHA),
AssemblyLine.implied(PHX),
AssemblyLine.implied(PHY))
} else if (ctx.options.flag(CompilationFlag.Emit65CE02Opcodes)) {
List(
AssemblyLine.implied(PHA),
AssemblyLine.implied(PHX),
AssemblyLine.implied(PHY),
AssemblyLine.implied(PHZ),
AssemblyLine.implied(CLD))
} else if (ctx.options.flag(CompilationFlag.EmitCmosOpcodes)) {
List(
AssemblyLine.implied(PHA),
AssemblyLine.implied(PHX),
@ -56,7 +80,7 @@ object MfCompiler {
AssemblyLine.implied(TSX),
AssemblyLine.immediate(LDA, 0xff),
AssemblyLine.immediate(SBX, m.stackVariablesSize),
AssemblyLine.implied(TXS))
AssemblyLine.implied(TXS)) // this TXS is fine, it won't appear in 65816 code
}
List.fill(m.stackVariablesSize)(AssemblyLine.implied(PHA))
}

35
src/main/scala/millfork/compiler/StatementCompiler.scala
View File

@ -35,7 +35,32 @@ object StatementCompiler {
val someRegisterAX = Some(w, RegisterVariable(Register.AX, w))
val someRegisterYA = Some(w, RegisterVariable(Register.YA, w))
val returnInstructions = if (m.interrupt) {
if (ctx.options.flag(CompilationFlag.EmitCmosOpcodes)) {
if (ctx.options.flag(CompilationFlag.EmitNative65816Opcodes)) {
List(
AssemblyLine.immediate(REP, 0x30),
AssemblyLine.implied(PLY),
AssemblyLine.implied(PLX),
AssemblyLine.implied(PLA),
AssemblyLine.implied(PLD),
AssemblyLine.implied(PLB),
AssemblyLine.implied(RTI))
} else
if (ctx.options.flag(CompilationFlag.EmitEmulation65816Opcodes)) {
List(
AssemblyLine.implied(PLY),
AssemblyLine.implied(PLX),
AssemblyLine.implied(PLA),
AssemblyLine.implied(PLD),
AssemblyLine.implied(PLB),
AssemblyLine.implied(RTI))
} else if (ctx.options.flag(CompilationFlag.Emit65CE02Opcodes)) {
List(
AssemblyLine.implied(PLZ),
AssemblyLine.implied(PLY),
AssemblyLine.implied(PLX),
AssemblyLine.implied(PLA),
AssemblyLine.implied(RTI))
} else if (ctx.options.flag(CompilationFlag.EmitCmosOpcodes)) {
List(
AssemblyLine.implied(PLY),
AssemblyLine.implied(PLX),
@ -50,6 +75,8 @@ object StatementCompiler {
AssemblyLine.implied(PLA),
AssemblyLine.implied(RTI))
}
} else if (m.isFar(ctx.options)) {
List(AssemblyLine.implied(RTL))
} else {
List(AssemblyLine.implied(RTS))
}
@ -373,17 +400,17 @@ object StatementCompiler {
AssemblyLine.implied(TSX),
AssemblyLine.immediate(LDA, 0xff),
AssemblyLine.immediate(SBX, 256 - m.stackVariablesSize),
AssemblyLine.implied(TXS))
AssemblyLine.implied(TXS)) // this TXS is fine, it won't appear in 65816 code
if (m.returnType.size == 1 && m.stackVariablesSize > 6)
return List(
AssemblyLine.implied(TAY),
AssemblyLine.implied(TSX),
AssemblyLine.immediate(LDA, 0xff),
AssemblyLine.immediate(SBX, 256 - m.stackVariablesSize),
AssemblyLine.implied(TXS),
AssemblyLine.implied(TXS), // this TXS is fine, it won't appear in 65816 code
AssemblyLine.implied(TYA))
}
AssemblyLine.implied(TSX) :: (List.fill(m.stackVariablesSize)(AssemblyLine.implied(INX)) :+ AssemblyLine.implied(TXS))
AssemblyLine.implied(TSX) :: (List.fill(m.stackVariablesSize)(AssemblyLine.implied(INX)) :+ AssemblyLine.implied(TXS)) // this TXS is fine, it won't appear in 65816 code
}
}