From 350c5d2d5d84f7f4ecb5a1de8ec959a424af79cc Mon Sep 17 00:00:00 2001
From: Karol Stasiak <karol.m.stasiak@gmail.com>
Date: Mon, 13 Jul 2020 22:10:04 +0200
Subject: [PATCH] 6809: fix indirect addressing mode
---
src/main/scala/millfork/output/M6809Assembler.scala | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/main/scala/millfork/output/M6809Assembler.scala b/src/main/scala/millfork/output/M6809Assembler.scala
index ada60e82..5b4b5a30 100644
--- a/src/main/scala/millfork/output/M6809Assembler.scala
+++ b/src/main/scala/millfork/output/M6809Assembler.scala
@@ -145,8 +145,9 @@ class M6809Assembler(program: Program,
index + 3
case MLine0(op, Absolute(true), param) if M6809Assembler.indexable.contains(op) =>
writeByte(bank, index, M6809Assembler.standard(op) + 0x20)
+ writeByte(bank, index + 1, 0x9f)
writeWord(bank, index + 2, param)
- index + 3
+ index + 4
case MLine0(op, Indexed(M6809Register.PC, indirect), param) if M6809Assembler.indexable.contains(op) =>
???
case MLine0(op, Indexed(register, indirect), param) if M6809Assembler.indexable.contains(op) =>