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Variable to register optimization fixes
This commit is contained in:
Karol Stasiak
parent
33716f3881
commit
4676b0d48e
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@ -17,15 +17,26 @@ object VariableToRegisterOptimization extends AssemblyOptimization {
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// If any of these opcodes is present within a method,
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// then it's too hard to assign any variable to a register.
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private val opcodesThatAlwaysPrecludeXAllocation = Set(JSR, STX, TXA, PHX, PLX, INX, DEX, CPX, SBX, SAX)
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private val opcodesThatAlwaysPrecludeXAllocation = Set(
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JSR, STX, TXA, INX, DEX, CPX,
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PHX, PLX,
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SBX, SAX, LXA, XAA, AHX, SHX, SHY, LAS, TAS)
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private val opcodesThatAlwaysPrecludeYAllocation = Set(JSR, STY, TYA, PHY, PLY, INY, DEY, CPY)
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private val opcodesThatAlwaysPrecludeYAllocation = Set(
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JSR, STY, TYA, INY, DEY, CPY,
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PHY, PLY,
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AHX, SHX, SHY, LAS, TAS)
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// If any of these opcodes is used on a variable
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// then it's too hard to assign that variable to a register.
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// Also, LDY prevents assigning a variable to X and LDX prevents assigning a variable to Y.
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private val opcodesThatCannotBeUsedWithIndexRegistersAsParameters =
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Set(EOR, ORA, AND, BIT, ADC, SBC, CMP, CPX, CPY, STY, STX)
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// Also, LDY prevents assigning a variable to X and LDX and LAX prevent assigning a variable to Y.
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private val opcodesThatCannotBeUsedWithIndexRegistersAsParameters = Set(
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BIT, CPX, CPY, STY,
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EOR, ORA, AND, ADC, SBC, CMP,
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ROL, ROR, LSR, ASL, STX,
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SAX, SLO, SRE, ISC, DCP, RLA, RRA,
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AHX, SHY, SHX, LAS, TAS,
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TRB, TSB)
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override def name = "Allocating variables to index registers"
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@ -138,25 +149,25 @@ object VariableToRegisterOptimization extends AssemblyOptimization {
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// if an address of a variable is used, then that variable cannot be assigned to a register
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None
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case AssemblyLine(_, AbsoluteX | AbsoluteY | ZeroPageX | ZeroPageY, MemoryAddressConstant(th), _) :: xs =>
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// if a variable is used as an array, then it cannot be assigned to a register
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case AssemblyLine(_, AbsoluteX | AbsoluteY | ZeroPageX | ZeroPageY | IndexedY | IndexedX | Indirect | AbsoluteIndexedX, MemoryAddressConstant(th), _) :: xs =>
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// if a variable is used as an array or a pointer, then it cannot be assigned to a register
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if (th.name == vx || th.name == vy) {
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None
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} else {
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canBeInlined(xCandidate, yCandidate, xs)
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}
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case AssemblyLine(opcode, Absolute, MemoryAddressConstant(th), _) :: xs
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case AssemblyLine(opcode, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vx && (opcode == LDY || opcodesThatCannotBeUsedWithIndexRegistersAsParameters(opcode)) =>
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// if a variable is used by some opcodes, then it cannot be assigned to a register
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None
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case AssemblyLine(opcode, Absolute, MemoryAddressConstant(th), _) :: xs
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case AssemblyLine(opcode, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vy && (opcode == LDX || opcode == LAX || opcodesThatCannotBeUsedWithIndexRegistersAsParameters(opcode)) =>
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// if a variable is used by some opcodes, then it cannot be assigned to a register
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None
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case AssemblyLine(LDX, Absolute, MemoryAddressConstant(th), elidable) :: xs
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case AssemblyLine(LDX, Absolute | ZeroPage, MemoryAddressConstant(th), elidable) :: xs
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if xCandidate.isDefined =>
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// if a register is populated with a different variable, then this variable cannot be assigned to that register
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// removing LDX saves 3 cycles
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@ -166,7 +177,7 @@ object VariableToRegisterOptimization extends AssemblyOptimization {
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None
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}
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case AssemblyLine(LAX, Absolute, MemoryAddressConstant(th), elidable) :: xs
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case AssemblyLine(LAX, Absolute | ZeroPage, MemoryAddressConstant(th), elidable) :: xs
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if xCandidate.isDefined =>
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// LAX = LDX-LDA, and since LDX simplifies to nothing and LDA simplifies to TXA,
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// LAX simplifies to TXA, saving two bytes
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@ -176,7 +187,7 @@ object VariableToRegisterOptimization extends AssemblyOptimization {
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None
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}
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case AssemblyLine(LDY, Absolute, MemoryAddressConstant(th), elidable) :: xs if yCandidate.isDefined =>
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case AssemblyLine(LDY, Absolute | ZeroPage, MemoryAddressConstant(th), elidable) :: xs if yCandidate.isDefined =>
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// if a register is populated with a different variable, then this variable cannot be assigned to that register
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// removing LDX saves 3 cycles
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if (elidable && th.name == vy) {
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@ -193,7 +204,7 @@ object VariableToRegisterOptimization extends AssemblyOptimization {
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// if a register is populated with something else than a variable, then no variable cannot be assigned to that register
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None
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case AssemblyLine(LDA, Absolute, MemoryAddressConstant(th), elidable) :: AssemblyLine(TAX, _, _, elidable2) :: xs
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case AssemblyLine(LDA, Absolute | ZeroPage, MemoryAddressConstant(th), elidable) :: AssemblyLine(TAX, _, _, elidable2) :: xs
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if xCandidate.isDefined =>
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// a variable cannot be inlined if there is TAX not after LDA of that variable
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// but LDA-TAX can be simplified to TXA
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@ -203,7 +214,7 @@ object VariableToRegisterOptimization extends AssemblyOptimization {
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None
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}
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case AssemblyLine(LDA, Absolute, MemoryAddressConstant(th), elidable) :: AssemblyLine(TAY, _, _, elidable2) :: xs
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case AssemblyLine(LDA, Absolute | ZeroPage, MemoryAddressConstant(th), elidable) :: AssemblyLine(TAY, _, _, elidable2) :: xs
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if yCandidate.isDefined =>
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// a variable cannot be inlined if there is TAY not after LDA of that variable
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// but LDA-TAY can be simplified to TYA
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@ -213,8 +224,8 @@ object VariableToRegisterOptimization extends AssemblyOptimization {
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None
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}
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case AssemblyLine(LDA | STA | INC | DEC, Absolute, MemoryAddressConstant(th), elidable) :: xs =>
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// changing LDA->TXA, STA->TAX, INC->INX, DEC->DEX saves 2 cycles
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case AssemblyLine(LDA | STA | INC | DEC | STZ, Absolute | ZeroPage, MemoryAddressConstant(th), elidable) :: xs =>
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// changing LDA->TXA, STA->TAX, INC->INX, DEC->DEX, STZ->LDA saves 2 cycles
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if (th.name == vy || th.name == vx) {
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if (elidable) {
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canBeInlined(xCandidate, yCandidate, xs).map(_ + 2)
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@ -254,80 +265,88 @@ object VariableToRegisterOptimization extends AssemblyOptimization {
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val vx = xCandidate.getOrElse("-")
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val vy = yCandidate.getOrElse("-")
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lines match {
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case AssemblyLine(INC, Absolute, MemoryAddressConstant(th), _) :: xs
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case AssemblyLine(INC, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vx =>
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AssemblyLine.implied(INX) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(INC, Absolute, MemoryAddressConstant(th), _) :: xs
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case AssemblyLine(INC, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vy =>
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AssemblyLine.implied(INY) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(DEC, Absolute, MemoryAddressConstant(th), _) :: xs
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case AssemblyLine(DEC, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vx =>
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AssemblyLine.implied(DEX) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(DEC, Absolute, MemoryAddressConstant(th), _) :: xs
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case AssemblyLine(DEC, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vy =>
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AssemblyLine.implied(DEY) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(LDX, Absolute, MemoryAddressConstant(th), _) :: xs
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case AssemblyLine(LDX, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vx =>
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inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(LAX, Absolute, MemoryAddressConstant(th), _) :: xs
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case AssemblyLine(LAX, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vx =>
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AssemblyLine.implied(TXA) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(LDY, Absolute, MemoryAddressConstant(th), _) :: xs
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case AssemblyLine(LDY, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vy =>
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inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(LDA, Absolute, MemoryAddressConstant(th), true) :: AssemblyLine(TAX, _, _, true) :: xs
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case AssemblyLine(LDA, Absolute | ZeroPage, MemoryAddressConstant(th), true) :: AssemblyLine(TAX, _, _, true) :: xs
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if th.name == vx =>
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// these TXA's may get optimized away by a different optimization
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AssemblyLine.implied(TXA) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(LDA, Absolute, MemoryAddressConstant(th), true) :: AssemblyLine(TAY, _, _, true) :: xs
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case AssemblyLine(LDA, Absolute | ZeroPage, MemoryAddressConstant(th), true) :: AssemblyLine(TAY, _, _, true) :: xs
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if th.name == vy =>
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// these TYA's may get optimized away by a different optimization
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AssemblyLine.implied(TYA) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(LDA, am, param, true) :: AssemblyLine(STA, Absolute, MemoryAddressConstant(th), true) :: xs
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case AssemblyLine(LDA, am, param, true) :: AssemblyLine(STA, Absolute | ZeroPage, MemoryAddressConstant(th), true) :: xs
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if th.name == vx && doesntUseX(am) =>
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// these TXA's may get optimized away by a different optimization
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AssemblyLine(LDX, am, param) :: AssemblyLine.implied(TXA) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(LDA, am, param, true) :: AssemblyLine(STA, Absolute, MemoryAddressConstant(th), true) :: xs
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case AssemblyLine(LDA, am, param, true) :: AssemblyLine(STA, Absolute | ZeroPage, MemoryAddressConstant(th), true) :: xs
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if th.name == vy && doesntUseY(am) =>
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// these TYA's may get optimized away by a different optimization
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AssemblyLine(LDY, am, param) :: AssemblyLine.implied(TYA) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(LDA, Absolute, MemoryAddressConstant(th), _) :: AssemblyLine(CMP, am, param, true) :: xs
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case AssemblyLine(LDA, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: AssemblyLine(CMP, am, param, true) :: xs
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if th.name == vx && doesntUseXOrY(am) =>
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// ditto
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AssemblyLine.implied(TXA) :: AssemblyLine(CPX, am, param) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(LDA, Absolute, MemoryAddressConstant(th), _) :: AssemblyLine(CMP, am, param, true) :: xs
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case AssemblyLine(LDA, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: AssemblyLine(CMP, am, param, true) :: xs
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if th.name == vy && doesntUseXOrY(am) =>
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// ditto
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AssemblyLine.implied(TYA) :: AssemblyLine(CPY, am, param) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(LDA, Absolute, MemoryAddressConstant(th), _) :: xs
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case AssemblyLine(LDA, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vx =>
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AssemblyLine.implied(TXA) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(LDA, Absolute, MemoryAddressConstant(th), _) :: xs
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case AssemblyLine(LDA, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vy =>
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AssemblyLine.implied(TYA) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(STA, Absolute, MemoryAddressConstant(th), _) :: xs
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case AssemblyLine(STA, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vx =>
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AssemblyLine.implied(TAX) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(STA, Absolute, MemoryAddressConstant(th), _) :: xs
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case AssemblyLine(STA, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vy =>
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AssemblyLine.implied(TAY) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(STZ, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vx =>
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AssemblyLine.immediate(LDX, 0) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(STZ, Absolute | ZeroPage, MemoryAddressConstant(th), _) :: xs
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if th.name == vy =>
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AssemblyLine.immediate(LDY, 0) :: inlineVars(xCandidate, yCandidate, xs)
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case AssemblyLine(TAX, _, _, _) :: xs if xCandidate.isDefined =>
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ErrorReporting.fatal("Unexpected TAX")
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@ -346,12 +365,12 @@ object VariableToRegisterOptimization extends AssemblyOptimization {
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}
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def doesntUseX(am: AddrMode.Value): Boolean = am match {
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case AbsoluteX | ZeroPageX | IndexedX => false
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case AbsoluteX | ZeroPageX | IndexedX | AbsoluteIndexedX => false
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case _ => true
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}
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def doesntUseXOrY(am: AddrMode.Value): Boolean = am match {
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case Immediate | ZeroPage | Absolute | Relative | Indirect => true
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case Immediate | ZeroPage | Absolute | Relative | Indirect | ZeroPageIndirect => true
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case _ => false
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}
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}
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