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8080: Inline assembly fixes

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This commit is contained in:
Karol Stasiak 2018-12-19 22:26:57 +01:00
parent 5153bd0551
commit 60666a6467
2 changed files with 9 additions and 3 deletions
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2
src/main/scala/millfork/compiler/z80/Z80StatementCompiler.scala
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@ -168,7 +168,7 @@ object Z80StatementCompiler extends AbstractStatementCompiler[ZLine] {
if (Seq(JP, JR, DJNZ, LABEL).contains(op)) { if (Seq(JP, JR, DJNZ, LABEL).contains(op)) {
MemoryAddressConstant(Label(name)) MemoryAddressConstant(Label(name))
} else { } else {
env.evalForAsm(expression).getOrElse(env.get[ThingInMemory](name, expression.position).toAddress) env.evalForAsm(expression).orElse(env.maybeGet[ThingInMemory](name).map(_.toAddress)).getOrElse(MemoryAddressConstant(Label(name)))
} }
case _ => case _ =>
env.evalForAsm(expression).getOrElse(env.errorConstant(s"`$expression` is not a constant", expression.position)) env.evalForAsm(expression).getOrElse(env.errorConstant(s"`$expression` is not a constant", expression.position))

10
src/main/scala/millfork/parser/Z80Parser.scala
View File

@ -138,6 +138,12 @@ case class Z80Parser(filename: String,
case (reg, addr) => (op, OneRegister(reg), None, addr.getOrElse(zero)) case (reg, addr) => (op, OneRegister(reg), None, addr.getOrElse(zero))
} }
def one8Or16Register(op8: ZOpcode.Value, op16: ZOpcode.Value): P[(ZOpcode.Value, OneRegister, Option[Expression], Expression)] = param(allowAbsolute = false).map{
case (reg@(ZRegister.MEM_IX_D | ZRegister.MEM_IY_D), Some(e)) => (op8, OneRegister(reg), Some(e), zero)
case (reg@(ZRegister.HL | ZRegister.DE | ZRegister.AF | ZRegister.SP | ZRegister.BC | ZRegister.IX | ZRegister.IY), addr) => (op16, OneRegister(reg), None, addr.getOrElse(zero))
case (reg, addr) => (op8, OneRegister(reg), None, addr.getOrElse(zero))
}
def one16Register(op: ZOpcode.Value): P[(ZOpcode.Value, OneRegister, Option[Expression], Expression)] = param(allowAbsolute = false).map{ def one16Register(op: ZOpcode.Value): P[(ZOpcode.Value, OneRegister, Option[Expression], Expression)] = param(allowAbsolute = false).map{
case (reg@(ZRegister.MEM_IX_D | ZRegister.MEM_IY_D), Some(e)) => (op, OneRegister(reg), Some(e), zero) case (reg@(ZRegister.MEM_IX_D | ZRegister.MEM_IY_D), Some(e)) => (op, OneRegister(reg), Some(e), zero)
case (ZRegister.MEM_ABS_8, addr) => (op, OneRegister(ZRegister.MEM_ABS_16), None, addr.getOrElse(zero)) case (ZRegister.MEM_ABS_8, addr) => (op, OneRegister(ZRegister.MEM_ABS_16), None, addr.getOrElse(zero))
@ -250,8 +256,8 @@ case class Z80Parser(filename: String,
case "OR" => one8Register(OR) case "OR" => one8Register(OR)
case "XOR" => one8Register(XOR) case "XOR" => one8Register(XOR)
case "SUB" => one8Register(SUB) case "SUB" => one8Register(SUB)
case "DEC" => one8Register(DEC) case "DEC" => one8Or16Register(DEC, INC_16)
case "INC" => one8Register(INC) case "INC" => one8Or16Register(INC, INC_16)
case "RLA" => imm(RLA) case "RLA" => imm(RLA)
case "RRA" => imm(RRA) case "RRA" => imm(RRA)