mirror of
https://github.com/KarolS/millfork.git
synced 2025-01-12 03:30:09 +00:00
Optimizations:
– optimize multiplication and division by constants – optimize multiplication, division and shifts for size
This commit is contained in:
Karol Stasiak
parent
8ea3957023
commit
663e38c264
@ -960,6 +960,19 @@ object BuiltIns {
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}
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def compileByteMultiplication(ctx: CompilationContext, v: Expression, c: Int): List[AssemblyLine] = {
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c match {
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case 0 =>
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if (v.isPure) return List(AssemblyLine.immediate(LDA, 0))
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else return MosExpressionCompiler.compileToA(ctx, v) ++ List(AssemblyLine.immediate(LDA, 0))
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case 1 => return MosExpressionCompiler.compileToA(ctx, v)
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case 2 | 4 | 8 | 16 | 32 =>
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return MosExpressionCompiler.compileToA(ctx, v) ++ List.fill(Integer.numberOfTrailingZeros(c))(AssemblyLine.implied(ASL))
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case 128 =>
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return MosExpressionCompiler.compileToA(ctx, v) ++ List(AssemblyLine.implied(ROR), AssemblyLine.implied(ROR), AssemblyLine.immediate(AND, 0x80))
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case 64 =>
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return MosExpressionCompiler.compileToA(ctx, v) ++ List(AssemblyLine.implied(ROR), AssemblyLine.implied(ROR), AssemblyLine.implied(ROR), AssemblyLine.immediate(AND, 0xC0))
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case _ =>
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}
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val result = ListBuffer[AssemblyLine]()
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// TODO: optimise
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val addingCode = simpleOperation(ADC, ctx, v, IndexChoice.PreferY, preserveA = false, commutative = false, decimal = false)
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@ -975,13 +988,28 @@ object BuiltIns {
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result += AssemblyLine.implied(ASL)
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}
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if ((mult & mask) != 0) {
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result ++= List(AssemblyLine.implied(CLC), adc)
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result += AssemblyLine.implied(CLC)
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result += adc
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empty = false
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}
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mask >>>= 1
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}
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result.toList
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val sizeIfCalling = addingCode.map(_.sizeInBytes).sum + 9
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val sizeIfUnrolling = result.map(_.sizeInBytes).sum
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var shouldUnroll = true
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if (ctx.options.zpRegisterSize >= 2) {
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if (ctx.options.flag(CompilationFlag.OptimizeForSize)) {
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shouldUnroll = sizeIfUnrolling <= sizeIfCalling
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} else if (!ctx.options.flag(CompilationFlag.OptimizeForSpeed)) {
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shouldUnroll = sizeIfUnrolling <= sizeIfCalling + 6
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}
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}
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if (shouldUnroll){
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result.toList
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} else {
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indexing ++ List(adc.copy(opcode = LDA)) ++ PseudoregisterBuiltIns.compileByteMultiplication(ctx, None, LiteralExpression(c, 1), storeInRegLo = false)
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}
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}
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//noinspection ZeroIndexToHead
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@ -991,13 +1019,26 @@ object BuiltIns {
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variables.length match {
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case 0 => List(AssemblyLine.immediate(LDA, constant & 0xff))
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case 1 =>
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val sim = simplicity(ctx.env, variables.head._1)
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if (sim >= 'I') {
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compileByteMultiplication(ctx, variables.head._1, constant)
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if (constant == 1) {
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MosExpressionCompiler.compileToA(ctx, variables.head._1)
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} else {
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MosExpressionCompiler.compileToA(ctx, variables.head._1) ++
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List(AssemblyLine.zeropage(STA, ctx.env.get[ThingInMemory]("__reg.b0"))) ++
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compileByteMultiplication(ctx, VariableExpression("__reg.b0"), constant)
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val sim = simplicity(ctx.env, variables.head._1)
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if (sim >= 'I') {
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compileByteMultiplication(ctx, variables.head._1, constant)
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} else {
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constant match {
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case 2 | 4 | 8 | 16 | 32 =>
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MosExpressionCompiler.compileToA(ctx, variables.head._1) ++ List.fill(Integer.numberOfTrailingZeros(constant))(AssemblyLine.implied(ASL))
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case 128 =>
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MosExpressionCompiler.compileToA(ctx, variables.head._1) ++ List(AssemblyLine.implied(ROR), AssemblyLine.implied(ROR), AssemblyLine.immediate(AND, 0x80))
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case 64 =>
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MosExpressionCompiler.compileToA(ctx, variables.head._1) ++ List(AssemblyLine.implied(ROR), AssemblyLine.implied(ROR), AssemblyLine.implied(ROR), AssemblyLine.immediate(AND, 0xC0))
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case _ =>
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MosExpressionCompiler.compileToA(ctx, variables.head._1) ++
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List(AssemblyLine.zeropage(STA, ctx.env.get[ThingInMemory]("__reg.b0"))) ++
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compileByteMultiplication(ctx, VariableExpression("__reg.b0"), constant)
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}
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}
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}
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case 2 =>
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if (constant == 1)
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@ -1036,6 +1077,8 @@ object BuiltIns {
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} else if (qq == 1) {
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if (modulo) List(AssemblyLine.immediate(LDA, 0).position(q.position))
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else MosExpressionCompiler.compileToA(ctx, p)
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} else if (qq >= 128 && !modulo) {
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MosExpressionCompiler.compileToA(ctx, p) ++ List(AssemblyLine.immediate(CMP, qq), AssemblyLine.immediate(LDA, 0), AssemblyLine.implied(ROL))
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} else if (isPowerOfTwoUpTo15(qq)) {
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if (modulo) MosExpressionCompiler.compileToA(ctx, p) :+ AssemblyLine.immediate(AND, qq - 1).position(q.position)
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else MosExpressionCompiler.compileToA(ctx, p) ++ List.fill(java.lang.Long.bitCount(qq-1))(AssemblyLine.implied(LSR).position(q.position))
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@ -272,6 +272,14 @@ object PseudoregisterBuiltIns {
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}
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}
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private def unrollShift(ctx: CompilationContext, count: Long, bodySize8bit: Int, bodySize16bit: Int): Boolean = {
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// TODO: figure out how this interacts with the optimizer
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val bodySize = if (ctx.options.flag(CompilationFlag.EmitNative65816Opcodes)) bodySize16bit else bodySize8bit
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if (ctx.options.flag(CompilationFlag.OptimizeForSpeed)) true
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else if (ctx.options.flag(CompilationFlag.OptimizeForSize)) count * bodySize < bodySize + 5 // will unroll up to <<2 (<<3 on 65816)
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else count * bodySize < bodySize + 13 // will unroll up to <<4 (<<7 on 65816)
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}
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def compileWordShiftOps(left: Boolean, ctx: CompilationContext, l: Expression, r: Expression): List[AssemblyLine] = {
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if (ctx.options.zpRegisterSize < 2) {
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ctx.log.error("Word shifting requires the zeropage pseudoregister", l.position)
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@ -279,12 +287,12 @@ object PseudoregisterBuiltIns {
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}
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val b = ctx.env.get[Type]("byte")
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val w = ctx.env.get[Type]("word")
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val reg = ctx.env.get[VariableInMemory]("__reg")
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val reg = ctx.env.get[VariableInMemory]("__reg.loword")
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val firstParamCompiled = MosExpressionCompiler.compile(ctx, l, Some(MosExpressionCompiler.getExpressionType(ctx, l) -> reg), NoBranching)
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ctx.env.eval(r) match {
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case Some(NumericConstant(0, _)) =>
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List(AssemblyLine.zeropage(LDA, reg), AssemblyLine.zeropage(LDX, reg, 1))
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case Some(NumericConstant(v, _)) if v > 0 =>
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case Some(NumericConstant(v, _)) if v > 0 && unrollShift(ctx, v, 2, 4) =>
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if (ctx.options.flag(CompilationFlag.EmitNative65816Opcodes)) {
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firstParamCompiled ++
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List(AssemblyLine.accu16) ++
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@ -468,17 +476,30 @@ object PseudoregisterBuiltIns {
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case (2 | 1, 1) => // ok
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case _ => ctx.log.fatal("Invalid code path", param2.position)
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}
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(ctx.env.eval(param1), ctx.env.eval(param2)) match {
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case (Some(l), Some(r)) =>
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val operator = if (modulo) MathOperator.Modulo else MathOperator.Divide
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val product = CompoundConstant(operator, l, r).quickSimplify
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return List(AssemblyLine.immediate(LDA, product.loByte), AssemblyLine.immediate(LDX, product.hiByte))
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// TODO: powers of 2, like with *
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case _ =>
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}
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val b = ctx.env.get[Type]("byte")
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val w = ctx.env.get[Type]("word")
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val reg = ctx.env.get[VariableInMemory]("__reg")
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(ctx.env.eval(param1), ctx.env.eval(param2)) match {
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case (Some(l), Some(r)) =>
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if (r.isProvablyZero) {
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ctx.log.error("Unsigned division by zero", param2.position)
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}
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val operator = if (modulo) MathOperator.Modulo else MathOperator.Divide
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val product = CompoundConstant(operator, l, r).quickSimplify
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return List(AssemblyLine.immediate(LDA, product.loByte), AssemblyLine.immediate(LDX, product.hiByte))
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case (_, Some(NumericConstant(p, _))) =>
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if (p == 0) {
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ctx.log.error("Unsigned division by zero", param2.position)
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}
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if (p == 1) {
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if (modulo) return MosExpressionCompiler.compile(ctx, param1, None, BranchSpec.None) ++ List(AssemblyLine.immediate(LDA, 0), AssemblyLine.immediate(LDX, 0))
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else return MosExpressionCompiler.compile(ctx, param1, Some(w -> RegisterVariable(MosRegister.AX, w)), BranchSpec.None)
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} else if (p < 256 && isPowerOfTwoUpTo15(p)) {
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if (modulo) return MosExpressionCompiler.compile(ctx, param1, Some(w -> RegisterVariable(MosRegister.AX, w)), BranchSpec.None) ++ List(AssemblyLine.immediate(AND, p - 1), AssemblyLine.immediate(LDX, 0))
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else return compileWordShiftOps(left = false, ctx, param1, LiteralExpression(Integer.numberOfTrailingZeros(p.toInt), 1))
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}
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case _ =>
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}
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val code1 = MosExpressionCompiler.compile(ctx, param1, Some(w -> RegisterVariable(MosRegister.AX, w)), BranchSpec.None)
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val code2 = MosExpressionCompiler.compile(ctx, param2, Some(b -> RegisterVariable(MosRegister.A, b)), BranchSpec.None)
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val load = if (!usesRegLo(code2) && !usesRegHi(code2)) {
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@ -912,24 +912,24 @@ object Z80ExpressionCompiler extends AbstractExpressionCompiler[ZLine] {
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if (f.functionName == "%%=") {
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calculateAddressToAppropriatePointer(ctx, l, forWriting = true) match {
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case Some((LocalVariableAddressViaHL, List(ZLine0(LD_16, TwoRegisters(ZRegister.HL, ZRegister.IMM_16), addr)))) =>
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Z80Multiply.compileUnsignedWordByByteDivision(ctx, Right(l), r) ++ List(
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Z80Multiply.compileUnsignedWordByByteDivision(ctx, Right(l), r, modulo = true) ++ List(
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ZLine.ldAbs8(addr, ZRegister.A),
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ZLine.register(XOR, ZRegister.A),
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ZLine.ldAbs8(addr+1, ZRegister.A)
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)
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case Some((lvo@LocalVariableAddressViaHL, code)) =>
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code ++ stashHLIfChanged(ctx, Z80Multiply.compileUnsignedWordByByteDivision(ctx, Left(lvo), r)) ++ List(
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code ++ stashHLIfChanged(ctx, Z80Multiply.compileUnsignedWordByByteDivision(ctx, Left(lvo), r, modulo = true)) ++ List(
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ZLine.ld8(ZRegister.MEM_HL, ZRegister.A),
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ZLine.register(INC_16, ZRegister.HL),
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ZLine.ldImm8(ZRegister.MEM_HL, 0)
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)
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case Some((lvo@LocalVariableAddressViaIX(offset), code)) =>
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code ++ Z80Multiply.compileUnsignedWordByByteDivision(ctx, Left(lvo), r) ++ List(
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code ++ Z80Multiply.compileUnsignedWordByByteDivision(ctx, Left(lvo), r, modulo = true) ++ List(
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ZLine.ldViaIx(offset, ZRegister.A),
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ZLine.ld0ViaIx(offset + 1)
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)
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case Some((lvo@LocalVariableAddressViaIY(offset), code)) =>
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code ++ Z80Multiply.compileUnsignedWordByByteDivision(ctx, Left(lvo), r) ++ List(
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code ++ Z80Multiply.compileUnsignedWordByByteDivision(ctx, Left(lvo), r, modulo = true) ++ List(
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ZLine.ldViaIy(offset, ZRegister.A),
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ZLine.ld0ViaIy(offset + 1)
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)
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@ -942,7 +942,7 @@ object Z80ExpressionCompiler extends AbstractExpressionCompiler[ZLine] {
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case Some((lvo@LocalVariableAddressViaHL, code)) =>
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code ++
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stashHLIfChanged(ctx,
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Z80Multiply.compileUnsignedWordByByteDivision(ctx, Left(LocalVariableAddressViaHL), r) ++ (
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Z80Multiply.compileUnsignedWordByByteDivision(ctx, Left(LocalVariableAddressViaHL), r, modulo = false) ++ (
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if (ctx.options.flags(CompilationFlag.EmitIntel8080Opcodes)) List(ZLine.implied(EX_DE_HL))
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else List(ZLine.ld8(ZRegister.E, ZRegister.L), ZLine.ld8(ZRegister.D, ZRegister.H))
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)
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@ -954,11 +954,11 @@ object Z80ExpressionCompiler extends AbstractExpressionCompiler[ZLine] {
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)
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case Some((lvo@LocalVariableAddressViaIX(offset), code)) =>
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code ++
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Z80Multiply.compileUnsignedWordByByteDivision(ctx, Left(lvo), r) ++
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Z80Multiply.compileUnsignedWordByByteDivision(ctx, Left(lvo), r, modulo = false) ++
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storeHLViaIX(ctx, offset, 2, signedSource = false)
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case Some((lvo@LocalVariableAddressViaIY(offset), code)) =>
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code ++
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Z80Multiply.compileUnsignedWordByByteDivision(ctx, Left(lvo), r) ++
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Z80Multiply.compileUnsignedWordByByteDivision(ctx, Left(lvo), r, modulo = false) ++
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storeHLViaIY(ctx, offset, 2, signedSource = false)
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case _ =>
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ctx.log.error("Invalid left-hand side", l.position)
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@ -969,14 +969,15 @@ object Z80ExpressionCompiler extends AbstractExpressionCompiler[ZLine] {
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case "/" | "%%" =>
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assertSizesForDivision(ctx, params, inPlace = false)
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val (l, r, size) = assertArithmeticBinary(ctx, params)
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val modulo = f.functionName == "%%"
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size match {
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case 1 =>
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targetifyA(ctx, target, Z80Multiply.compileUnsignedByteDivision(ctx, Right(l), r, f.functionName == "%%"), isSigned = false)
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targetifyA(ctx, target, Z80Multiply.compileUnsignedByteDivision(ctx, Right(l), r, modulo), isSigned = false)
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case 2 =>
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if (f.functionName == "%%") {
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targetifyA(ctx, target, Z80Multiply.compileUnsignedWordByByteDivision(ctx, Right(l), r), isSigned = false)
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if (modulo) {
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targetifyA(ctx, target, Z80Multiply.compileUnsignedWordByByteDivision(ctx, Right(l), r, modulo = true), isSigned = false)
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} else {
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targetifyHL(ctx, target, Z80Multiply.compileUnsignedWordByByteDivision(ctx, Right(l), r))
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targetifyHL(ctx, target, Z80Multiply.compileUnsignedWordByByteDivision(ctx, Right(l), r, modulo = false))
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}
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}
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case "*'=" =>
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@ -106,7 +106,7 @@ object Z80Multiply {
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/**
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* Calculate HL = p / q and A = p %% q
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*/
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def compileUnsignedWordByByteDivision(ctx: CompilationContext, p: Either[LocalVariableAddressOperand, Expression], q: Expression): List[ZLine] = {
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def compileUnsignedWordByByteDivision(ctx: CompilationContext, p: Either[LocalVariableAddressOperand, Expression], q: Expression, modulo: Boolean): List[ZLine] = {
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val pb = p match {
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case Right(pp) => Z80ExpressionCompiler.compileToHL(ctx, pp)
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case Left(LocalVariableAddressViaHL) => List(
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@ -118,6 +118,42 @@ object Z80Multiply {
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case Left(LocalVariableAddressViaIX(offset)) => List(ZLine.ldViaIx(ZRegister.L, offset), ZLine.ldViaIx(ZRegister.H, offset+1))
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case Left(LocalVariableAddressViaIY(offset)) => List(ZLine.ldViaIy(ZRegister.L, offset), ZLine.ldViaIy(ZRegister.H, offset+1))
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}
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ctx.env.eval(q) match {
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case Some(NumericConstant(0, _)) =>
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ctx.log.error("Unsigned division by zero", q.position)
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return pb
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case Some(NumericConstant(1, _)) =>
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if (modulo) {
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return pb :+ ZLine.ldImm8(ZRegister.A, 0)
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} else {
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return pb
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}
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case Some(NumericConstant(qc, _)) if qc <= 255 && isPowerOfTwoUpTo15(qc) =>
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val count = Integer.numberOfTrailingZeros(qc.toInt)
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if (modulo) {
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return pb ++ List(ZLine.ld8(ZRegister.A, ZRegister.L), ZLine.imm8(ZOpcode.AND, qc.toInt - 1))
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} else {
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val extendedOps = ctx.options.flag(CompilationFlag.EmitExtended80Opcodes)
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val shiftHL = if (extendedOps) {
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(0L until count).flatMap(_ => List(
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ZLine.register(ZOpcode.SRL, ZRegister.H),
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ZLine.register(ZOpcode.RR, ZRegister.L)
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))
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} else {
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(0 until count).flatMap(_ => List(
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ZLine.ld8(ZRegister.A, ZRegister.H),
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ZLine.register(ZOpcode.OR, ZRegister.A),
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ZLine.implied(ZOpcode.RRA),
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ZLine.ld8(ZRegister.H, ZRegister.A),
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ZLine.ld8(ZRegister.A, ZRegister.L),
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ZLine.implied(ZOpcode.RRA),
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ZLine.ld8(ZRegister.L, ZRegister.A)
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))
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}
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return pb ++ shiftHL
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}
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case _ =>
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}
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val qb = Z80ExpressionCompiler.compileToA(ctx, q)
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val load = if (qb.exists(Z80ExpressionCompiler.changesHL)) {
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pb ++ Z80ExpressionCompiler.stashHLIfChanged(ctx, qb)
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@ -168,7 +204,7 @@ object Z80Multiply {
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compileUnsignedByteDivisionImpl(ctx, p, qq.toInt, modulo)
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}
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case _ =>
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val call = compileUnsignedWordByByteDivision(ctx, p, q)
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val call = compileUnsignedWordByByteDivision(ctx, p, q, modulo = modulo)
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if (modulo) {
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call
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} else {
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@ -253,6 +289,9 @@ object Z80Multiply {
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count match {
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case 0 => List(ZLine.ldImm8(A, 0))
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case 1 => Nil
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case 128 => List(ZLine.implied(RRCA), ZLine.imm8(AND, 0x80))
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case 64 => List(ZLine.implied(RRCA), ZLine.implied(RRCA), ZLine.imm8(AND, 0xC0))
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case 32 => List(ZLine.implied(RRCA), ZLine.implied(RRCA), ZLine.implied(RRCA), ZLine.imm8(AND, 0xE0))
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case n if n > 0 && n.-(1).&(n).==(0) => List.fill(Integer.numberOfTrailingZeros(n))(ZLine.register(ADD, A))
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case _ =>
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ZLine.ld8(E,A) :: Integer.toString(count & 0xff, 2).tail.flatMap{
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@ -157,6 +157,7 @@ class ByteMathSuite extends FunSuite with Matchers with AppendedClues {
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private def multiplyCase1(x: Int, y: Int): Unit = {
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EmuCrossPlatformBenchmarkRun(Cpu.Mos, Cpu.Z80, Cpu.Intel8080, Cpu.Sharp, Cpu.Intel8086)(
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s"""
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| import zp_reg
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| byte output @$$c000
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| void main () {
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| output = $x
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@ -185,6 +186,7 @@ class ByteMathSuite extends FunSuite with Matchers with AppendedClues {
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private def multiplyCase2(x: Int, y: Int): Unit = {
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EmuCrossPlatformBenchmarkRun(Cpu.Mos, Cpu.Z80, Cpu.Intel8080, Cpu.Sharp, Cpu.Intel8086)(
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s"""
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| import zp_reg
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| byte output @$$c000
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| void main () {
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| byte a
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