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Z80: fix an optimization

This commit is contained in:
Karol Stasiak 2023-01-27 18:15:10 +01:00
parent f4d2fdd370
commit 75cc34663c
1 changed files with 10 additions and 0 deletions
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10
src/main/scala/millfork/assembly/z80/opt/ChangeRegisterPair.scala
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@ -174,6 +174,11 @@ class ChangeRegisterPair(preferBC2DE: Boolean) extends AssemblyOptimization[ZLin
case (x@ZLine0(_, TwoRegisters(r, BC), _)) :: xs =>
x.copy(registers = TwoRegisters(r, DE)) :: switchBC2DE(xs)
case (x@ZLine0(_, TwoRegisters(MEM_BC, r), _)) :: xs =>
x.copy(registers = TwoRegisters(MEM_DE, r)) :: switchBC2DE(xs)
case (x@ZLine0(_, TwoRegisters(r, MEM_BC), _)) :: xs =>
x.copy(registers = TwoRegisters(r, MEM_DE)) :: switchBC2DE(xs)
case (x@ZLine0(_, TwoRegisters(B, r), _)) :: xs =>
x.copy(registers = TwoRegisters(D, r)) :: switchBC2DE(xs)
case (x@ZLine0(_, TwoRegisters(r, B), _)) :: xs =>
@ -222,6 +227,11 @@ class ChangeRegisterPair(preferBC2DE: Boolean) extends AssemblyOptimization[ZLin
case (x@ZLine0(_, TwoRegisters(r, DE), _)) :: xs =>
x.copy(registers = TwoRegisters(r, BC)) :: switchDE2BC(xs)
case (x@ZLine0(_, TwoRegisters(MEM_DE, r), _)) :: xs =>
x.copy(registers = TwoRegisters(MEM_BC, r)) :: switchDE2BC(xs)
case (x@ZLine0(_, TwoRegisters(r, MEM_DE), _)) :: xs =>
x.copy(registers = TwoRegisters(r, MEM_BC)) :: switchDE2BC(xs)
case (x@ZLine0(_, TwoRegisters(D, r), _)) :: xs =>
x.copy(registers = TwoRegisters(B, r)) :: switchDE2BC(xs)
case (x@ZLine0(_, TwoRegisters(r, D), _)) :: xs =>