diff --git a/src/main/scala/millfork/assembly/z80/opt/CoarseFlowAnalyzer.scala b/src/main/scala/millfork/assembly/z80/opt/CoarseFlowAnalyzer.scala
index 0eba885f..1e454e2a 100644
--- a/src/main/scala/millfork/assembly/z80/opt/CoarseFlowAnalyzer.scala
+++ b/src/main/scala/millfork/assembly/z80/opt/CoarseFlowAnalyzer.scala
@@ -218,6 +218,8 @@ object CoarseFlowAnalyzer {
             currentStatus = currentStatus.setRegister(t, SingleStatus(value.toInt))
           case ZLine0(LD_16, TwoRegisters(ZRegister.HL, ZRegister.IMM_16), xx) =>
             currentStatus = currentStatus.setHL(SingleStatus(xx))
+          case ZLine0(LD, TwoRegisters(ZRegister.A, ZRegister.I | ZRegister.R), _) =>
+            currentStatus = currentStatus.copy(a = AnyStatus, zf = AnyStatus, sf = AnyStatus, pf = AnyStatus, hf = AnyStatus, nf = AnyStatus)
           case ZLine0(LD, TwoRegisters(t, ZRegister.IMM_8), NumericConstant(value, _)) =>
             currentStatus = currentStatus.setRegister(t, SingleStatus(value.toInt))
           case ZLine0(LD, TwoRegistersOffset(t, ZRegister.IMM_8, o), NumericConstant(value, _)) =>
diff --git a/src/main/scala/millfork/assembly/z80/opt/ReverseFlowAnalyzer.scala b/src/main/scala/millfork/assembly/z80/opt/ReverseFlowAnalyzer.scala
index dbe395fd..cc4f8948 100644
--- a/src/main/scala/millfork/assembly/z80/opt/ReverseFlowAnalyzer.scala
+++ b/src/main/scala/millfork/assembly/z80/opt/ReverseFlowAnalyzer.scala
@@ -241,6 +241,8 @@ object ReverseFlowAnalyzer {
             currentImportance = currentImportance.copy(a = Unimportant)
           case ZLine0(DISCARD_F, _, _) =>
             currentImportance = currentImportance.copy(cf = Unimportant, zf = Unimportant, sf = Unimportant, pf = Unimportant, hf = Unimportant, nf = Unimportant)
+          case ZLine0(LD, TwoRegisters(ZRegister.A, ZRegister.I | ZRegister.R), _) =>
+            currentImportance = currentImportance.copy(a = Unimportant, pf = Unimportant)
           case ZLine0(LD, TwoRegistersOffset(t, s, o), _) =>
             currentImportance = currentImportance.butWritesRegister(t, o).butReadsRegister(s, o)
           case ZLine0(LD | LD_16, TwoRegisters(t, s), _) =>