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8- and 16-bit shifting for Z80
This commit is contained in:
Karol Stasiak
parent
f7f22767e4
commit
893515b649
@ -194,10 +194,18 @@ object Z80ExpressionCompiler extends AbstractExpressionCompiler[ZLine] {
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???
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case "<<" =>
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val (l, r, size) = assertBinary(ctx, params)
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???
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size match {
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case 1 => targetifyA(target, Z80Shifting.compile8BitShift(ctx, l, r, left = true))
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case 2 => Z80Shifting.compile16BitShift(ctx, l, r, left = true)
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case _ => ???
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}
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case ">>" =>
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val (l, r, size) = assertBinary(ctx, params)
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???
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size match {
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case 1 => targetifyA(target, Z80Shifting.compile8BitShift(ctx, l, r, left = false))
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case 2 => Z80Shifting.compile16BitShift(ctx, l, r, left = false)
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case _ => ???
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}
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case "<<'" =>
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assertAllBytes("Long shift ops not supported", ctx, params)
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val (l, r, 1) = assertBinary(ctx, params)
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@ -251,10 +259,18 @@ object Z80ExpressionCompiler extends AbstractExpressionCompiler[ZLine] {
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Nil
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case "<<=" =>
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val (l, r, size) = assertAssignmentLike(ctx, params)
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???
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size match {
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case 1 => Z80Shifting.compile8BitShiftInPlace(ctx, l, r, left = true)
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case 2 => Z80Shifting.compile16BitShift(ctx, l, r, left = true) ++ storeHL(ctx, l, signedSource = false)
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case _ => ???
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}
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case ">>=" =>
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val (l, r, size) = assertAssignmentLike(ctx, params)
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???
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size match {
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case 1 => Z80Shifting.compile8BitShiftInPlace(ctx, l, r, left = false)
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case 2 => Z80Shifting.compile16BitShift(ctx, l, r, left = false) ++ storeHL(ctx, l, signedSource = false)
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case _ => ???
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}
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case "<<'=" =>
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val (l, r, size) = assertAssignmentLike(ctx, params)
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???
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@ -352,6 +368,20 @@ object Z80ExpressionCompiler extends AbstractExpressionCompiler[ZLine] {
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}
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}
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def calculateAddressToAppropriatePointer(ctx: CompilationContext, expr: LhsExpression): Option[(LocalVariableAddressOperand, List[ZLine])] = {
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val env = ctx.env
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expr match {
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case VariableExpression(name) =>
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env.get[Variable](name) match {
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case v:VariableInMemory => Some(LocalVariableAddressViaHL -> List(ZLine.ldImm16(ZRegister.HL, v.toAddress)))
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case v:StackVariable => Some(LocalVariableAddressViaIX(v.baseOffset) -> Nil)
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}
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case i:IndexedExpression => Some(LocalVariableAddressViaHL -> calculateAddressToHL(ctx, i))
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case _:SeparateBytesExpression => None
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case _ => ???
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}
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}
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def calculateAddressToHL(ctx: CompilationContext, i: IndexedExpression): List[ZLine] = {
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val env = ctx.env
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env.getPointy(i.name) match {
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188
src/main/scala/millfork/compiler/z80/Z80Shifting.scala
Normal file
188
src/main/scala/millfork/compiler/z80/Z80Shifting.scala
Normal file
@ -0,0 +1,188 @@
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package millfork.compiler.z80
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import millfork.CompilationFlag
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import millfork.assembly.z80.{NoRegisters, ZLine, ZOpcode}
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import millfork.compiler.CompilationContext
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import millfork.env.NumericConstant
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import millfork.node.{Expression, LhsExpression, ZRegister}
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import scala.collection.GenTraversableOnce
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/**
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* @author Karol Stasiak
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*/
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object Z80Shifting {
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private def fixAfterShiftIfNeeded(extendedOps: Boolean, left: Boolean, i: Long): List[ZLine] =
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if (extendedOps) {
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Nil
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} else if (left) {
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List(ZLine.imm8(ZOpcode.AND, 0xff & (0xff << i)))
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} else {
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List(ZLine.imm8(ZOpcode.AND, 0xff & (0xff >> i)))
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}
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def compile8BitShift(ctx: CompilationContext, lhs: Expression, rhs: Expression, left: Boolean): List[ZLine] = {
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val env = ctx.env
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val extendedOps = ctx.options.flag(CompilationFlag.EmitExtended80Opcodes)
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val op =
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if (extendedOps) {
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if (left) ZOpcode.SLA else ZOpcode.SRL
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} else {
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if (left) ZOpcode.RLC else ZOpcode.RRC
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}
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val l = Z80ExpressionCompiler.compileToA(ctx, lhs)
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env.eval(rhs) match {
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case Some(NumericConstant(i, _)) =>
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if (i <= 0) {
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l
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} else if (i >= 8) {
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l :+ ZLine.ldImm8(ZRegister.A, 0)
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} else {
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l ++ List.tabulate(i.toInt)(_ => ZLine.register(op, ZRegister.A)) ++ fixAfterShiftIfNeeded(extendedOps, left, i)
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}
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case _ =>
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val calcCount = Z80ExpressionCompiler.compileToA(ctx, rhs) :+ ZLine.ld8(ZRegister.B, ZRegister.A)
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val l = Z80ExpressionCompiler.stashBCIfChanged(Z80ExpressionCompiler.compileToA(ctx, lhs))
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val loopBody = ZLine.register(op, ZRegister.A) :: fixAfterShiftIfNeeded(extendedOps, left, 1)
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val label = Z80Compiler.nextLabel("sh")
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calcCount ++ l ++ List(ZLine.label(label)) ++ loopBody :+ ZLine.djnz(label)
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}
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}
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def compile8BitShiftInPlace(ctx: CompilationContext, lhs: LhsExpression, rhs: Expression, left: Boolean): List[ZLine] = {
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val env = ctx.env
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val extendedOps = ctx.options.flag(CompilationFlag.EmitExtended80Opcodes)
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val op =
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if (extendedOps) {
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if (left) ZOpcode.SLA else ZOpcode.SRL
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} else {
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if (left) ZOpcode.RLC else ZOpcode.RRC
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}
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env.eval(rhs) match {
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case Some(NumericConstant(i, _)) =>
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if (i <= 0) {
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Z80ExpressionCompiler.compileToA(ctx, lhs)
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} else if (i >= 8) {
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ZLine.ldImm8(ZRegister.A, 0) :: Z80ExpressionCompiler.storeA(ctx, lhs, signedSource = false)
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} else {
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Z80ExpressionCompiler.calculateAddressToAppropriatePointer(ctx, lhs) match {
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case Some((register, l)) =>
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// SLA A = 8 cycles
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// SLA (HL) = 15 cycles
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// LD A,(HL) or LD (HL),A = 7 cycles
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// SLA (IX+d) = 23 cycles
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// LD A,(IX+d) or LD (IX+d),A = 19 cycles
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// when using A is profitable?
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// for HL:
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// 15x > 7 + 8x + 7
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// 7x > 14
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// x > 2
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// for IX+d
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// 23x > 19 + 8x + 19
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// 15x > 38
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// x > 2.5
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// so:
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// - for x <= 2, don't use A
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// - for x >= 3, use A
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if (extendedOps && i <= 2) {
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l ++ List.tabulate(i.toInt)(_ => ZLine.register(op, register))
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} else {
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l ++ List(ZLine.ld8(ZRegister.A, register)) ++
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List.tabulate(i.toInt)(_ => ZLine.register(op, ZRegister.A)) ++
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fixAfterShiftIfNeeded(extendedOps, left, i) ++
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List(ZLine.ld8(register, ZRegister.A))
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}
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}
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}
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case _ =>
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val calcCount = Z80ExpressionCompiler.compileToA(ctx, rhs) :+ ZLine.ld8(ZRegister.B, ZRegister.A)
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val l = Z80ExpressionCompiler.stashBCIfChanged(Z80ExpressionCompiler.compileToA(ctx, lhs))
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val loopBody = ZLine.register(op, ZRegister.A) :: fixAfterShiftIfNeeded(extendedOps, left, 1)
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val label = Z80Compiler.nextLabel("sh")
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calcCount ++ l ++ List(ZLine.label(label)) ++ loopBody ++ List(ZLine.djnz(label)) ++ Z80ExpressionCompiler.storeA(ctx, lhs, signedSource = false)
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}
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}
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def compile16BitShift(ctx: CompilationContext, lhs: Expression, rhs: Expression, left: Boolean): List[ZLine] = {
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val env = ctx.env
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val extendedOps = ctx.options.flag(CompilationFlag.EmitExtended80Opcodes)
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val l = Z80ExpressionCompiler.compileToHL(ctx, lhs)
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env.eval(rhs) match {
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case Some(NumericConstant(i, _)) =>
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if (i <= 0) {
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l
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} else if (i >= 16) {
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l :+ ZLine.ldImm16(ZRegister.HL, 0)
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// } else if (i > 8) { // TODO: optimize shifts larger than 8
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// ???
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} else {
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if (left) {
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l ++ List.tabulate(i.toInt)(_ => ZLine.registers(ZOpcode.ADD_16, ZRegister.HL, ZRegister.HL))
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} else {
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if (extendedOps) {
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l ++ (0L until i).flatMap(_ => List(
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ZLine.register(ZOpcode.SRL, ZRegister.H),
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ZLine.register(ZOpcode.RRC, ZRegister.L)
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))
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} else {
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l ++ (1L until i).flatMap(_ => List(
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ZLine.ld8(ZRegister.A, ZRegister.H),
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ZLine.register(ZOpcode.RRC, ZRegister.A),
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ZLine.ld8(ZRegister.H, ZRegister.A),
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ZLine.ld8(ZRegister.A, ZRegister.L),
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ZLine.register(ZOpcode.RRC, ZRegister.A),
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ZLine.ld8(ZRegister.L, ZRegister.A)
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)) ++ List(
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ZLine.ld8(ZRegister.A, ZRegister.H),
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ZLine.register(ZOpcode.RRC, ZRegister.A),
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ZLine.imm8(ZOpcode.AND, (0xff >> i) & 0xff),
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ZLine.ld8(ZRegister.H, ZRegister.A),
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ZLine.ld8(ZRegister.A, ZRegister.L),
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ZLine.register(ZOpcode.RRC, ZRegister.A),
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// ZLine.imm8(ZOpcode.AND, (0xff << (i - 8)) & 0xff), // TODO: properly mask the low byte!!!
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ZLine.ld8(ZRegister.L, ZRegister.A)
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)
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}
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}
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}
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case _ =>
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val calcCount = Z80ExpressionCompiler.compileToA(ctx, rhs) :+ ZLine.ld8(ZRegister.B, ZRegister.A)
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val loopBody =
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if (extendedOps) {
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if (left) {
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List(
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ZLine.register(ZOpcode.SLA, ZRegister.L),
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ZLine.register(ZOpcode.RLC, ZRegister.H))
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} else {
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List(
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ZLine.register(ZOpcode.SRL, ZRegister.H),
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ZLine.register(ZOpcode.RRC, ZRegister.L))
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}
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} else {
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if (left) {
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List(
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ZLine.ld8(ZRegister.A, ZRegister.L),
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ZLine.register(ZOpcode.RLC, ZRegister.A),
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ZLine.imm8(ZOpcode.AND, 0xfe),
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ZLine.ld8(ZRegister.L, ZRegister.A),
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ZLine.ld8(ZRegister.A, ZRegister.H),
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ZLine.register(ZOpcode.RLC, ZRegister.A),
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ZLine.ld8(ZRegister.H, ZRegister.A))
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} else {
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List(
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ZLine.ld8(ZRegister.A, ZRegister.H),
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ZLine.register(ZOpcode.RRC, ZRegister.A),
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ZLine.imm8(ZOpcode.AND, 0x7f),
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ZLine.ld8(ZRegister.H, ZRegister.A),
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ZLine.ld8(ZRegister.A, ZRegister.L),
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ZLine.register(ZOpcode.RRC, ZRegister.A),
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ZLine.ld8(ZRegister.L, ZRegister.A))
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}
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}
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val label = Z80Compiler.nextLabel("sh")
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calcCount ++ l ++ List(ZLine.label(label)) ++ loopBody :+ ZLine.djnz(label)
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}
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}
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}
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@ -1,5 +1,6 @@
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package millfork.test
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import millfork.test.emu.{EmuBenchmarkRun, EmuUltraBenchmarkRun, EmuUnoptimizedRun}
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import millfork.CpuFamily
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import millfork.test.emu._
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import org.scalatest.{FunSuite, Matchers}
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/**
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@ -8,18 +9,18 @@ import org.scalatest.{FunSuite, Matchers}
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class ShiftSuite extends FunSuite with Matchers {
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test("In-place shifting") {
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EmuUnoptimizedRun("""
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EmuUnoptimizedCrossPlatformRun(CpuFamily.M6502, CpuFamily.I80)("""
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| array output [3] @$c000
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| void main () {
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| output[0] = 1
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| output[1] = 3
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| output[output[0]] <<= 2
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| }
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""".stripMargin).readByte(0xc001) should equal(12)
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""".stripMargin){_.readByte(0xc001) should equal(12)}
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}
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test("Byte shifting") {
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EmuBenchmarkRun("""
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EmuCrossPlatformBenchmarkRun(CpuFamily.M6502, CpuFamily.I80)("""
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| byte output @$c000
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| void main () {
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| byte a
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@ -73,7 +74,7 @@ class ShiftSuite extends FunSuite with Matchers {
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}
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test("Variable shifting") {
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EmuBenchmarkRun("""
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EmuCrossPlatformBenchmarkRun(CpuFamily.M6502, CpuFamily.I80)("""
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| word output0 @$c000
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| word output2 @$c002
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| byte output4 @$c004
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